Digital to analog converter

Patent metadata

Field	Value
Publication number	US-2017194981-A1
Application number	US-201414482734-A
Country	US
Kind code	A1
Filing date	May 6, 2014
Priority date	May 6, 2014
Publication date	Jul 6, 2017
Grant date	—

Abstract

Digital to analog converters have first and second to analog arrays. The first digital to analog array has a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output. The second digital to analog array includes a reference input, a reference output that is coupled to the reference input of the first digital to analog array, a plurality of switches coupled to the reference input, and a plurality of resistors coupled between the switches and the reference output.

First claim

What is claimed is:

1 . A digital to analog converter comprising:
a first digital to analog array having a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output; and a second digital to analog array comprising:
a digital input;
a reference input that is connectable to a first voltage source;
a reference output that is coupled to the reference input of the first digital to analog array;
a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input; and
a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between one of the second terminal of at least one of the switches and the reference output, and wherein at least two resistors connected in parallel are connected between the second terminal of at least one of the switches and the reference output.

2 . The digital to analog converter of claim 1 , wherein the third digital to analog array comprises a third digital to analog array comprising:
a digital input, a reference input that is coupled to the reference output of the first digital to analog array; a reference output that is connectable to a second voltage source; a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input; and a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between the second terminal of at least one of the switches and the reference output, and wherein at least two resistors are connected in parallel between the second terminal of at least one of the switches and the reference output.

3 . The digital to analog converter of claim 1 , wherein the resistors all have the same value of resistance.

4 . The digital to analog converter of claim 2 , wherein:
the resistors in the second digital to analog array are arranged to form a first network; the resistors in the third digital to analog array are arranged to form a second network; and the first network is the mirror image of the second network.

5 . The digital to analog converter of claim 2 wherein the third digital to analog array comprises a switch connected between the reference input and the reference output and wherein the switch shorts the reference input to the reference output when the switch is closed.

6 . The digital to analog converter of claim 1 , wherein the second digital array sets a plurality of resistance values between the reference input and the reference output wherein the number of resistance values corresponds to the number of least significant bits of the digital signal.

7 . The digital to analog converter of claim 1 , wherein the second digital array sets a plurality of resistance values between the reference input and the reference output wherein the number of resistance values corresponds to the number of least significant bits of the digital signal.

8 . The digital to analog converter of claim 2 , wherein:
four different resistance values are settable by the second digital to analog array, the difference between resistance values being substantially the same; and four different resistance values are settable by the third digital to analog array, the difference between resistance values being substantially the same.

9 . The digital to analog converter of claim 8 , wherein the second digital to analog array has four switches and wherein the third digital to analog array has five switches.

10 . The digital to analog converter of claim 8 , wherein three resistors are connected in series between one of the switches of the second digital array and the reference output.

11 . The digital to analog converter of claim 2 , wherein:
eight different resistance values are settable by the second digital to analog array, the difference between resistance values being substantially the same; and eight different resistance values are settable by the third digital to analog array, the difference between resistance values being substantially the same.

12 . The digital to analog converter of claim 11 , wherein a single resistor is connected between the reference input and the reference output of the third digital array.

13 . The digital to analog converter of claim 11 , wherein three resistors are connected in parallel between the reference input and one of the switches of the third digital array.

14 . The digital to analog converter of claim 11 , wherein four resistors are connected in parallel between the reference input and one of the switches of the third digital array.

15 . The digital to analog converter of claim 11 , wherein seven resistors are connected in series between the reference input and a first one of the switches of the third digital array.

16 . The digital to analog converter of claim 15 , wherein a second one of the switches is connected between the junction of two of the seven resistors and the reference output.

17 . The digital to analog converter of claim 2 , wherein the third digital array has more switches than the second digital array.

18 . The digital to analog converter of claim 2 , wherein the third digital array has one more switch than the second digital array.

19 . A digital to analog converter comprising:
a first digital to analog array having a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output; a second digital to analog array comprising:
a digital input,
a reference input that is connectable to a first voltage source;
a reference output that is coupled to the reference input of the first digital to analog array;
a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between one of the second terminal of at least one of the switches and the reference output, wherein at least two resistors connected in parallel are connected between the second terminal of at least one of the switches and the reference output, wherein four resistance values are able to be set between the reference input and the reference output, and wherein the differences between resistance values are substantially equal;
a third digital to analog array comprising:
a digital input,
a reference input that is coupled to the reference output of the first digital to analog array;
a reference output that is connectable to a second voltage source;
a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between the second terminal of at least one of the switches and the reference output, wherein at least two resistors are connected in parallel between the second terminal of at least one of the switches and the reference output,

Assignees

• Zhang Jun
• Zhang Zefei
• Su Anzhe
• Meng Hao
• Wen Xianguang
• Wang Xuan
• Texas Instruments Inc

Inventors

• Jun Zhang
• Zefei Zhang
• Anzhe Su
• Meng Hao
• Wen Xianguang
• Wang Xuan

Classifications

• H03M1/68 Primary

  with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits · CPC title

• H03M1/76

  using switching tree · CPC title

• H03M1/808

  using resistors · CPC title