Systems and methods for clock synchronization in a data acquisition system
US-2015372681-A1 · Dec 24, 2015 · US
US2017194967A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017194967-A1 |
| Application number | US-201615385325-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 20, 2016 |
| Priority date | Jan 6, 2016 |
| Publication date | Jul 6, 2017 |
| Grant date | — |
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A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency set by the frequency control data by using a resonator, and a processor that is configured to perform a signal process on input frequency control data to output frequency control data. The processor is configured to obtain a pre-estimated value x̂ − (k) at a time step k by adding a post-estimated value x̂(k−1) and a correction value D(k−1) at a time step k−1 together during a process of updating a pre-estimated value in a Karman filter process, and perform aging correction on the frequency control data on the basis of a result of the Karman filter process.
Opening claim text (preview).
What is claimed is: 1 . A circuit device comprising: an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency set by frequency control data by using a resonator a processor that is configured to; perform a signal process on input frequency control data to output the frequency control data; obtain a pre-estimated value x̂ − (k) at a time step k by adding a post-estimated value x̂(k−1) and a correction value D(k−1) at a time step k−1 together during a process of updating a pre-estimated value in a Karman filter process; and perform aging correction on the frequency control data on the basis of a result of the Karman filter process. 2 . The circuit device according to claim 1 , wherein the processor is configured to obtain the correction value D(k−1) on the basis of an observation residual in the Karman filter process. 3 . The circuit device according to claim 1 , wherein the processor is configured to obtain the pre-estimated value x̂ − (k) at the time step k according to x̂ − (k)=x̂(k−1)+D(k−1) by adding the post-estimated value x̂(k−1) and the correction value D(k−1) at the time step k−1 together. 4 . The circuit device according to claim 3 , wherein the processor is configured to obtain the correction value D(k) at the time step k on the basis of the correction value D(k−1) at the time step k−1 and an observation residual ek in the Karman filter process. 5 . The circuit device according to claim 4 , wherein, in a case where a constant is indicated by E, the processor is configured to obtain the correction value D(k) according to D(k)=D(k−1)+E·ek. 6 . The circuit device according to claim 5 , further comprising: a storage that stores the constant E. 7 . The circuit device according to claim 1 , wherein the processor is configured to perform the signal process on the input frequency control data which is based on a phase comparison result between an input signal based on the oscillation signal and a reference signal, estimate a true value for an observed value of the input frequency control data through the Karman filter process in a period before a hold-over state due to the absence or abnormality of the reference signal is detected, and generate aging-corrected frequency control data, in a case where the hold-over state is detected, by holding the true value at a timing corresponding to a timing of detecting the hold-over state, and by performing a calculation based on the true value. 8 . The circuit device according to claim 7 , wherein the processor is configured to generate the aging-corrected frequency control data by performing the calculation of adding the correction value to the true value. 9 . The circuit device according to claim 8 , wherein the processor is configured to perform the calculation of adding the correction value after a filter process to the true value. 10 . The circuit device according to claim 1 , further comprising: a storage that stores a system noise constant for setting system noise in the Karman filter process and an observation noise constant for setting observation noise in the Karman filter process. 11 . The circuit device according to claim 1 , further comprising: a digital interface that monitors the pre-estimated value and an observed value. 12 . An oscillator comprising: the circuit device according to claim 1 ; and the resonator. 13 . An electronic apparatus comprising the circuit device according to claim 1 . 14 . A vehicle comprising the circuit device according to claim 1 .
Stabilisation of generator output against variations of physical values, e.g. power supply · CPC title
All digital phase-locked loop · CPC title
the amplifier being a single transistor (H03B5/364 - H03B5/368 take precedence) · CPC title
by using a memory for digitally storing correction values (H03L1/025 takes precedence) · CPC title
the means being voltage variable capacitance diodes · CPC title
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