Oscillator with inherent comparator delay influence eliminated

Patent metadata

Field	Value
Publication number	US-2017194952-A1
Application number	US-201615387624-A
Country	US
Kind code	A1
Filing date	Dec 21, 2016
Priority date	Dec 31, 2015
Publication date	Jul 6, 2017
Grant date	—

Abstract

An oscillator includes: a current source; a capacitor coupled between the current source and a reference ground; a first switch coupled to the capacitor in parallel; an error amplifier coupled to the capacitor and configured to generate a regulation voltage based on a reference voltage and the voltage across the capacitor; a comparator configured to compare the voltage across the capacitor with the regulation voltage and generate a comparison signal; and a one-shot circuit coupled to the comparator, wherein based on the comparison signal, the one-shot circuit generates a trigger signal to control the first switch.

First claim

What is claimed is:

1 . An oscillator comprising:
a current source having a first terminal and a second terminal, wherein the first terminal is coupled to a power supply voltage; a capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the current source, the second terminal is coupled to a reference ground; a first switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the capacitor, the second terminal is coupled to the reference ground; an error amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive a reference voltage, the second input terminal is coupled to the first terminal of the capacitor, and wherein based on the reference voltage and the voltage across the capacitor, the error amplifier generates a regulation voltage at the output terminal; a comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the first terminal of the capacitor, the second input terminal is coupled to the output terminal of the error amplifier, and wherein the comparator compares the voltage across the capacitor with the regulation voltage, and generates a comparison signal at the output terminal; and a one-shot circuit having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the comparator, the output terminal is coupled to the control terminal of the first switch, and wherein based on the comparison signal, the one-shot circuit generates a trigger signal at the output terminal.

2 . The oscillator of claim 1 , wherein the error amplifier is disabled when the first switch is on.

3 . The oscillator of claim 1 , wherein the error amplifier further has an enable terminal, and wherein the oscillator further comprises:
a NOT gate having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the one-shot circuit, the output terminal is coupled to the enable terminal of the error amplifier.

4 . The oscillator of claim 1 , further comprising:
a second switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the capacitor, the second terminal is coupled to the second input terminal of the error amplifier; and a NOT gate having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the one-shot circuit, the output terminal is coupled to the control terminal of the second switch.

5 . The oscillator of claim 1 , further comprising:
a third switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the output terminal of the error amplifier, the second terminal is coupled to the second input terminal of the comparator; and a NOT gate having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the one-shot circuit, the output terminal is coupled to the control terminal of the third switch.

6 . The oscillator of claim 1 , further comprising:
an average sensing circuit having an input terminal and an output terminal, wherein the input terminal is coupled to the first terminal of the capacitor, the output terminal is coupled to the second input terminal of the error amplifier, and wherein the average sensing circuit senses the average value of the voltage across the capacitor, and generates an average signal indicative of the average value at the output terminal.

7 . The oscillator of claim 1 , further comprising:
a peak sensing circuit having an input terminal and an output terminal, wherein the input terminal is coupled to the first terminal of the capacitor, the output terminal is coupled to the second input terminal of the error amplifier, and wherein the peak sensing circuit senses the peak value of the voltage across the capacitor, and generates a peak signal indicative of the peak value at the output terminal.

8 . An oscillator comprising:
a first current source having a first terminal and a second terminal, wherein the first terminal is coupled to a power supply voltage; a first capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the first current source, the second terminal is coupled to a reference ground; a first switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the first capacitor, the second terminal is coupled to the reference ground; a second current source having a first terminal and a second terminal, wherein the first terminal is coupled to the power supply voltage; a second capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the second current source, the second terminal is coupled to the reference ground; a second switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the second capacitor, the second terminal is coupled to the reference ground; a third switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the first capacitor; a fourth switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the second capacitor; an error amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive a reference voltage, the second input terminal is coupled to the second terminals of the third and fourth switches, and the output terminal provides a regulation voltage; a first comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the first terminal of the first capacitor, the second input terminal is coupled to the output terminal of the error amplifier, and wherein the first comparator compares the voltage across the first capacitor with the regulation voltage, and generates a first comparison signal at the output terminal; a second comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the first terminal of the second capacitor, the second input terminal is coupled to the output terminal of the error amplifier, and wherein the second comparator compares the voltage across the second capacitor with the regulation voltage, and generates a second comparison signal at the output terminal; a flip-flop having a first input terminal, a second input terminal, a first output terminal and a second output terminal, wherein the first input terminal is coupled to the output terminal of the first comparator, the second input terminal is coupled to the output terminal of the second comparator, the first output terminal is coupled to the control terminal of the first switch, the second output terminal is coupled to the control terminal of the second switch, wherein based on the first and second comparison signals, the flip-flop generates a first trigger signal and a second trigger signal respectively at the first and second output terminals; a first NOT gate having an input terminal and an output terminal, wherein the input terminal is coupled to the first output terminal of the flip-flop, the output termin

Assignees

• Chengdu Monolithic Power Sys

Inventors

• Xu Li

Classifications

• H03B2200/0052

  including measures to switch the feedback circuit · CPC title

• H03B2200/005

  including measures to switch a capacitor · CPC title

• H02M2001/0009

  Electricity · mapped topic

• H03K4/502 Primary

  the capacitor being charged from a constant-current source · CPC title

• H02M3/04

  by static converters · CPC title