Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

US2017194438A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017194438-A1
Application numberUS-201715468941-A
CountryUS
Kind codeA1
Filing dateMar 24, 2017
Priority dateJan 16, 2015
Publication dateJul 6, 2017
Grant date

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Abstract

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A silicon carbide semiconductor device, including a silicon carbide semiconductor structure, an insulated gate structure including a gate insulating film contacting the silicon carbide semiconductor structure and a gate electrode formed on the gate insulating film, an interlayer insulating film covering the insulated gate structure, a metal layer provided on the interlayer insulating film for absorbing or blocking hydrogen, and a main electrode provided on the metal layer and electrically connected to the silicon carbide semiconductor structure.

First claim

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What is claimed is: 1 . A silicon carbide semiconductor device, comprising: a silicon carbide semiconductor structure; an insulated gate structure including a gate insulating film, which is a silicon dioxide film, contacting the silicon carbide semiconductor structure, and a gate electrode formed on the gate insulating film; an interlayer insulating film covering the insulated gate structure; a metal layer provided on the interlayer insulating film for absorbing or blocking hydrogen; and a main electrode provided on the metal layer and electrically connected to the silicon carbide semiconductor structure. 2 . The silicon carbide semiconductor device according to claim 1 , wherein the metal layer is a titanium film. 3 . The silicon carbide semiconductor device according to claim 1 , wherein the metal layer covers an entire top surface of the interlayer insulating film. 4 . The silicon carbide semiconductor device according to claim 1 , wherein the interlayer insulating film covers the insulated gate structure and contacts the gate insulating film. 5 . The silicon carbide semiconductor device according to claim 1 , wherein the main electrode is free of direct contact with the interlayer insulating film and the gate insulating film. 6 . The silicon carbide semiconductor device according to claim 1 , wherein a thickness of the metal layer is 10 nm to 1.0 μm. 7 . The silicon carbide semiconductor device according to claim 6 , wherein the thickness of the metal layer is 80 nm to 150 nm. 8 . The silicon carbide semiconductor device according to claim 1 , wherein the metal layer has an absorbed hydrogen molecule concentration of 1×10 16 /cm 2 or higher. 9 . The silicon carbide semiconductor device according to claim 1 , wherein the metal layer is a first metal layer, and the silicon carbide semiconductor device further includes a second metal layer provided between the first metal layer and the main electrode, the second metal layer being chemically stable with respect to the first metal layer. 10 . The silicon carbide semiconductor device according to claim 9 , wherein the second metal layer is a titanium nitride film. 11 . The silicon carbide semiconductor device according to claim 9 , further comprising a third metal layer, provided between the second metal layer and the main electrode, for absorbing or blocking the hydrogen. 12 . The silicon carbide semiconductor device according to claim 11 , wherein the third metal layer is a titanium film. 13 . The silicon carbide semiconductor device according to claim 11 , further comprising an alloy film provided between the third metal layer and the main electrode, the alloy film containing titanium and aluminum. 14 . The silicon carbide semiconductor device according to claim 1 , further comprising an alloy film provided between the metal layer and the main electrode, the alloy film containing titanium and aluminum. 15 . The silicon carbide semiconductor device according to claim 14 , wherein a thickness of the alloy film is 10 nm to 50 nm. 16 . The silicon carbide semiconductor device according to claim 1 , wherein the main electrode is a first main electrode; the silicon carbide semiconductor device further includes a silicon carbide semiconductor substrate, and an n-type drift layer and a second main electrode respectively provided on two opposite surfaces of the silicon carbide semiconductor substrate; the silicon carbide semiconductor structure includes a p-type semiconductor region selectively formed in the n-type drift layer, and an n-type semiconductor region selectively provided in the p-type semiconductor region; the gate insulating film covers a surface of a portion of the p-type semiconductor region between the n-type drift layer and the n-type semiconductor region; and the first main electrode is electrically connected to the n-type semiconductor region. 17 . The silicon carbide semiconductor device according to claim 16 , wherein the silicon carbide semiconductor substrate is of an n-type and has an impurity concentration that is higher than that of the n-type drift layer. 18 . A method of manufacturing a silicon carbide semiconductor device, comprising: providing a silicon carbide semiconductor base having a silicon carbide semiconductor structure formed thereon; forming an insulated gate structure, including thermally oxidizing the silicon carbide semiconductor structure to form a silicon dioxide film on a surface thereof, and forming a gate electrode on the silicon dioxide film; forming an interlayer insulating film covering the insulated gate structure; forming a titanium film on the interlayer insulating film; and forming on the titanium film a main electrode that is electrically connected to the silicon carbide semiconductor structure. 19 . The method of manufacturing a silicon carbide semiconductor device according to claim 18 , comprising performing heat treating at a temperature of 450 degrees C. or less after forming the main electrode.

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What does patent US2017194438A1 cover?
A silicon carbide semiconductor device, including a silicon carbide semiconductor structure, an insulated gate structure including a gate insulating film contacting the silicon carbide semiconductor structure and a gate electrode formed on the gate insulating film, an interlayer insulating film covering the insulated gate structure, a metal layer provided on the interlayer insulating film for a…
Who is the assignee on this patent?
Fuji Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D64/0115. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 06 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).