Electronic component and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-2017194419-A1
Application number	US-201615251565-A
Country	US
Kind code	A1
Filing date	Aug 30, 2016
Priority date	Jan 4, 2016
Publication date	Jul 6, 2017
Grant date	—

Abstract

An electronic component includes a body part and a via part. The body part includes first and second metal layers disposed with at least one dielectric layer interposed therebetween. The via part is disposed in the body part and includes first and second vias penetrating through the body part and selectively connected to the first and second metal layers, respectively. The first and second metal layers contain different metals. In some examples, a first insulating film is disposed between the first metal layer and the second via to electrically insulate the second via from the first metal layer, and a second insulating film is disposed between the second metal layer and the first via to electrically insulate the first via from the second metal layer. A method for forming the electronic component includes use of first and second etchants to selectively etch the first and second metal layers.

First claim

What is claimed is:

1 . An electronic component comprising:
a body part including first and second metal layers disposed with at least one dielectric layer interposed therebetween; and a via part disposed in the body part and including first and second vias penetrating through the body part and selectively connected to the first and second metal layers, respectively, wherein the first and second metal layers contain different metals.

2 . The electronic component of claim 1 , wherein the body part includes:
a first insulating film disposed between the first metal layer and the second via; and a second insulating film disposed between the second metal layer and the first via.

3 . The electronic component of claim 2 , wherein the first via is electrically insulated from the second metal layer by the second insulating film, and
the second via is electrically insulated from the first metal layer by the first insulating film.

4 . The electronic component of claim 2 , wherein the first insulating film is disposed on a same layer as the first metal layer and encloses the second via, and
the second insulating film is disposed on a same layer as the second metal layer and encloses the first via.

5 . The electronic component of claim 2 , wherein a corner of a surface of the first insulating film contacting the first metal layer and a corner of a surface of the second insulating film contacting the second metal layer have a rounded shape.

6 . The electronic component of claim 1 , wherein the first and second metal layers contain aluminum (Al) and copper (Cu) respectively, chromium (Cr) and copper (Cu) respectively, chromium (Cr) and gold (Au) respectively, copper (Cu) and aluminum (Al) respectively, copper (Cu) and chromium (Cr) respectively, copper (Cu) and nickel (Ni) respectively, copper (Cu) and titanium (Ti) respectively, copper (Cu) and tungsten (W) respectively, gold (Au) and chromium (Cr) respectively, gold (Au) and titanium (Ti) respectively, nickel (Ni) and copper (Cu) respectively, nickel (Ni) and titanium (Ti) respectively, titanium (Ti) and copper (Cu) respectively, titanium (Ti) and gold (Au) respectively, titanium (Ti) and nickel (Ni) respectively, titanium (Ti) and tungsten (W) respectively, tungsten (W) and copper (Cu) respectively, tungsten (W) and titanium (Ti) respectively, or titanium (Ti) and nickel (Ni) respectively.

7 . The electronic component of claim 1 , wherein the at least one dielectric layer contains at least one of a barium titanate (BT)-based ceramic powder and a strontium barium titanate (SBT)-based ceramic powder.

8 . The electronic component of claim 1 , further comprising an electrode part disposed on the body part and including first and second external electrodes connected to the first and second vias, respectively.

9 . The electronic component of claim 8 , wherein the body part further includes an insulating layer formed as an outermost surface thereof, and
the first and second external electrodes are disposed on the insulating layer so as to be spaced apart from each other.

10 . The electronic component of claim 1 , further comprising a support part including a substrate disposed on one side of the body part and supporting the body part.

11 . The electronic component of claim 1 , wherein the electronic component is a thin film capacitor, and
the first and second metal layers are first and second internal electrodes, respectively.

12 . The electronic component of claim 1 , wherein the first and second vias penetrating through the body part have different dimensions from each other.

13 . The electronic component of claim 1 , wherein the first via includes a plurality of vias each penetrating through the first and second metal layers and the at least one dielectric layer of the body part and each electrically connected to the first metal layers, and the second via includes a plurality of vias each penetrating through the first and second metal layers and the at least one dielectric layer of the body part and each electrically connected to the second metal layers.

14 . A method of manufacturing an electronic component, comprising:
sequentially forming first metal layers and second metal layers on a substrate with dielectric layers interposed between the first and second metal layers; forming a second via hole penetrating through the first metal layers, the dielectric layers, and the second metal layers; etching portions of the first metal layers on an inner wall of the second via hole using a first etchant to form first groove parts, wherein the first etchant only etches the first metal layers from among the first and second metal layers and the dielectric layers; forming a first via hole penetrating through the first metal layers, the dielectric layers, and the second metal layers; etching portions of the second metal layers on an inner wall of the first via hole using a second etchant to form second groove parts, wherein the second etchant only etches the second metal layers from among the first and second metal layers and the dielectric layers; filling the first and second groove parts with an insulating material to form first and second insulating films; and filling the first and second via holes with a conductive material to form first and second vias.

15 . The method of claim 14 , further comprising:
forming an insulating layer as a layer formed outermost among the first metal layers, the dielectric layers, and the second metal layers, wherein before the forming of the first via hole and the forming of the second via hole, the method includes a step for patterning the insulating layer for forming the first via hole and the second via hole.

16 . The method of claim 15 , further comprising:
forming first and second external electrodes on the insulating layer, the first and second external electrodes being connected to the first and second vias, respectively.

17 . The method of claim 14 , wherein the first and second metal layers contain aluminum (Al) and copper (Cu) respectively, chromium (Cr) and copper (Cu) respectively, chromium (Cr) and gold (Au) respectively, copper (Cu) and aluminum (Al) respectively, copper (Cu) and chromium (Cr) respectively, copper (Cu) and nickel (Ni) respectively, copper (Cu) and titanium (Ti) respectively, copper (Cu) and tungsten (W) respectively, gold (Au) and chromium (Cr) respectively, gold (Au) and titanium (Ti) respectively, nickel (Ni) and copper (Cu) respectively, nickel (Ni) and titanium (Ti) respectively, titanium (Ti) and copper (Cu) respectively, titanium (Ti) and gold (Au) respectively, titanium (Ti) and nickel (Ni) respectively, titanium (Ti) and tungsten (W) respectively, tungsten (W) and copper (Cu) respectively, tungsten (W) and titanium (Ti) respectively, or titanium (Ti) and nickel (Ni) respectively.

18 . A method of manufacturing an electronic component, comprising:
sequentially forming first metal layers and second metal layers containing different metals on a substrate with dielectric layers interposed between the first and second metal layers; forming a first via hole penetrating through the first metal layers, the dielectric layers, and the second metal layers; forming a first insulating film between the first metal layers and the first via hole; and filling the first via hole with a conductive material to form a first via that penetrates through the first metal layers, the dielectric layers, and the second metal layers, that is electrically connected to the second metal layers, and that is electrically insulated from

Assignees

• Samsung Electro Mech

Inventors

• Lee Hai Joon
• Kosaki Makoto
• Park Ji Hyun
• Lim Jong Bong

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/9413

  on encapsulations · CPC title