Power Device Cassette With Auxiliary Emitter Contact

Patent metadata

Field	Value
Publication number	US-2017194301-A1
Application number	US-201715465561-A
Country	US
Kind code	A1
Filing date	Mar 21, 2017
Priority date	Oct 15, 2013
Publication date	Jul 6, 2017
Grant date	—

Abstract

A press pack module includes a collector module terminal, an emitter module terminal, a gate module terminal, and an auxiliary module terminal. Each IGBT cassette within the module includes a set of shims, two contact pins, and an IGBT die. The first contact pin provides part of a first electrical connection between the gate module terminal and the IGBT gate pad. The second contact pin provides part of a second electrical connection between the auxiliary module terminal and a shim that in turn contacts the IGBT emitter pad. The electrical connection between the auxiliary emitter terminal and each emitter pad of the many IGBTs is a balanced impedance network. The balanced network is not part of the high current path through the module. By supplying a gate drive signal between the gate and auxiliary emitter terminals, simultaneous IGBT turn off in high speed and high current switching conditions is facilitated.

First claim

What is claimed is:

1 . A power semiconductor device module comprising:
a top plate member; a bottom plate member having a plurality of pedestals; a plurality of semiconductor device dice, where each of the semiconductor device dice is positioned above a corresponding one of the plurality of pedestals between the bottom plate member and the top plate member, wherein each of the semiconductor device dice has: 1) a first power pad disposed on a frontside of the semiconductor device die, 2) a control pad disposed on the frontside of the semiconductor device die, 3) a second power pad disposed on a backside of the semiconductor device die; a collar having a circular outer periphery; a first terminal disposed outside the circular outer periphery of the collar, wherein the first terminal is coupled to the control pads of the semiconductor power device dice; and a second terminal disposed outside the circular outer periphery of the collar, wherein the second terminal is coupled to the first power pads of the semiconductor power device dice without being electrically connected through either the top plate member or the bottom plate member.

2 . The power device of claim 1 , wherein the semiconductor device dice are Insulated Gate Bipolar Transistor (IBGT) device dice, wherein the first terminal is a gate terminal, and wherein the second terminal is an auxiliary emitter terminal.

3 . The power semiconductor device module of claim 2 , wherein the bottom plate member also has a second plurality of pedestals, wherein the power semiconductor device module further comprises a plurality power diodes, and wherein each of the plurality of power diodes is positioned above a corresponding one of the second plurality of pedestals between the bottom plate member and the top plate member.

4 . The power semiconductor device module of claim 1 , further comprising:
a first branched balanced impedance network that couples the first terminal to the control pads of the semiconductor power device dice; and a second branched balanced impedance network that couples the second terminal to the first power pads of the semiconductor power device dice.

5 . The power semiconductor device module of claim 4 , wherein the first branched balanced impedance network includes a first plurality of spring-loaded contact pins, and wherein the second branched balanced impedance network includes a second plurality of spring-loaded contact pins.

6 . The power semiconductor device module of claim 5 , wherein the power semiconductor device module comprises a Printed Circuit Board (PCB), and wherein both the first branched balanced impedance network and the second branched balanced impedance network extend through the PCB.

7 . The power semiconductor device module of claim 1 , further comprising:
a plurality of insulative four-sided frames, wherein each of the four-sided frames is disposed around a corresponding one of the plurality of pedestals.

8 . The power semiconductor device module of claim 7 , wherein each of the four-sided frames has a first channel and a second channel, wherein a first spring-loaded contact pin is disposed in the first channel, and wherein a second spring-loaded contact pin is disposed in the second channel.

9 . The power semiconductor device module of claim 8 , wherein the first spring-loaded contact pin contacts a gate pad of a semiconductor device die disposed in the frame, wherein the second spring-loaded contact pin contacts a shim disposed in the frame, and wherein the shim is in physical contact with an emitter pad of the semiconductor device die.

10 . The power semiconductor device module of claim 1 , wherein a first conductive path extends from the first terminal, and through a first spring-loaded contact pin, and to a gate pad of one of the semiconductor power device dice, and wherein a second conductive path extends from the second terminal, and through a second spring-loaded contact pin, through a shim, and to an emitter pad of said one of the semiconductor power device dice.

11 . The power semiconductor device of claim 1 , wherein the power semiconductor device is a disc-shaped press pack module.

12 . A power semiconductor device module comprising:
a top plate member; a bottom plate member having a plurality of pedestals; a plurality of semiconductor device dice, where each of the semiconductor device dice is positioned above a corresponding one of the plurality of pedestals between the bottom plate member and the top plate member, wherein each of the semiconductor device dice has an emitter pad and a gate pad; an auxiliary emitter terminal, wherein the auxiliary emitter terminal is coupled via a branched network to the emitter pads of the semiconductor device dice; and a main emitter terminal, wherein the main emitter terminal is coupled through the pedestals to the emitter pads of the semiconductor device dice, and wherein the branched network does not extend through any of the pedestals.

13 . The power semiconductor device module of claim 12 , wherein the branched network extends through a first plurality of spring loaded contact pins, and wherein the main emitter terminal is coupled through no spring loaded contact pin to the emitter pad of any of the semiconductor device dice.

14 . The power semiconductor device module of claim 13 , further comprising:
a gate terminal, wherein the gate terminal is coupled through a second plurality of spring loaded contact pins to the gate pads of the semiconductor device dice.

15 . The power semiconductor device module of claim 12 , wherein the main emitter terminal is a surface of the bottom plate member.

16 . The power semiconductor device module of claim 12 , wherein the main emitter terminal is a surface of a circular bottom lid, wherein the bottom lid is attached to the bottom plate member.

17 . A method comprising:
providing a power semiconductor device die so that the power semiconductor device die is disposed between a pedestal of a disc-shaped bottom plate member and a disc-shaped top plate member, wherein the disc-shaped bottom plate member, the disc-shaped top plate member, and the power semiconductor device die are parts of a press pack semiconductor device module; providing a first conductive path between a first pad on a power semiconductor device die and a first terminal of the press pack semiconductor device module, wherein the first conductive path extends through a first contact pin, wherein the first conductive path extends through neither the disc-shaped top plate member nor the disc-shaped bottom plate member; and providing a second conductive path between a second pad on the power semiconductor device die and a second terminal of the press pack semiconductor device module, wherein the second conductive path extends through a second contact pin, wherein the second conductive path extends through neither the disc-shaped top plate member nor the disc-shaped bottom plate member.

18 . The method of claim 17 , further comprising:
providing a four-sided frame so that the four-sided frame is disposed around the pedestal, wherein the four-sided frame has a first channel through which the first contact pin extends, and wherein the four-sided frame has a second channel through which the second contact pin extends.

19 . A power semiconductor device module comprising:
a top plate member; a plurality of pedestals; a plurality of semiconductor device dice, where each of the semiconductor device dice is positioned above a corresponding one of the plu

Assignees

• Ixys Corp

Inventors

• Golland Ashley
• Wakeman Franklin J
• Neal Howard D

Classifications

• H10W72/944

  Dispositions of multiple bond pads · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W76/13

  Containers comprising a conductive base serving as an interconnection · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title