Systems and methods for compressing a digital signal

US2017194012A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017194012-A1
Application numberUS-201715466624-A
CountryUS
Kind codeA1
Filing dateMar 22, 2017
Priority dateJun 25, 2014
Publication dateJul 6, 2017
Grant date

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Abstract

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A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal, a multi-bit quantizer configured to quantize the intermediate signal into an uncompressed digital output signal, and a feedback digital-to-analog converter having a feedback output configured to generate a feedback output signal responsive to the uncompressed digital output signal in order to combine the input signal and the feedback output signal at the loop filter input. The digital compression circuit may be configured to receive the uncompressed digital output signal and compress the uncompressed digital output signal into a compressed digital output signal having fewer quantization levels than that of the uncompressed digital output signal.

First claim

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1 .- 56 . (canceled) 57 . A system comprising: a digital compression circuit configured to receive an uncompressed digital signal and compress the uncompressed digital signal into a compressed digital signal having fewer quantization levels than that of the uncompressed digital signal, wherein for each given sample of the uncompressed digital signal, the digital compression circuit generates a corresponding sample of the compressed digital signal based on at least a first quantization level transition between the given sample and a first previous sample sampled consecutively previous to the given sample and a second quantization level transition between the first previous sample and a second previous sample sampled consecutively previous to the first previous sample. 58 . The system of claim 57 , wherein: the uncompressed digital signal comprises M bits; the compressed digital signal comprises N bits; and M and N are each positive integers and M>N. 59 . The system of claim 57 , wherein for each given sample of the uncompressed digital signal, the digital compression circuit generates a corresponding sample of the compressed digital signal based on transition statistics of a multi-bit quantizer. 60 . The system of claim 57 , wherein a function of the digital compression circuit for compressing the uncompressed digital signal into the compressed digital signal is selected based on transition statistics of a multi-bit quantizer in order to minimize transition frequency of bits making up the compressed digital signal. 61 . The system of claim 57 , wherein a function of the digital compression circuit for compressing the uncompressed digital signal into the compressed digital signal limits possible transitions between quantization levels of the uncompressed digital signal of consecutive samples of the uncompressed digital signal to a subset of the quantization levels of the uncompressed digital signal. 62 . The system of claim 61 , wherein the function limits possible transitions between quantization levels of the uncompressed digital signal of consecutive samples of the uncompressed digital signal in order to minimize degradation to the compressed digital signal. 63 . The system of claim 57 , further comprising a processing circuit for decompressing the compressed digital signal. 64 . The system of claim 57 , further comprising: a driver configured to transmit the compressed digital signal; a memory configured to store one or more transmitted compressed digital samples of the compressed digital signal in order of transmission; and an error recovery circuit configured to cause the driver to re-transmit the one or more transmitted compressed digital samples in response to an error in transmission of the compressed digital signal. 65 . The system of claim 57 , further comprising a multi-bit quantizer configured to limit possible transitions between quantization levels of the uncompressed digital signal of consecutive samples of the uncompressed digital signal to a subset of the quantization levels of the uncompressed digital signal. 66 . A method comprising: compressing an uncompressed digital signal into a compressed digital signal having fewer quantization levels than that of the uncompressed digital signal; and for each given sample of the uncompressed digital signal, generating a corresponding sample of the compressed digital signal based on at least a first quantization level transition between the given sample and a first previous sample sampled consecutively previous to the given sample and a second quantization level transition between the first previous sample and a second previous sample sampled consecutively previous to the first previous sample. 67 . The method of claim 66 , wherein: the uncompressed digital signal comprises M bits; the compressed digital signal comprises N bits; and M and N are each positive integers and M>N. 68 . The method of claim 66 , further comprising, for each given sample of the uncompressed digital signal, generating a corresponding sample of the compressed digital signal based on transition statistics of a multi-bit quantizer. 69 . The method of claim 66 , wherein a function for compressing the uncompressed digital signal into the compressed digital signal is selected based on transition statistics of a multi-bit quantizer in order to minimize transition frequency of bits making up the compressed digital signal. 70 . The method of claim 66 , wherein a function for compressing the uncompressed digital signal into the compressed digital signal limits possible transitions between quantization levels of the uncompressed digital signal of consecutive samples of the uncompressed digital signal to a subset of the quantization levels of the uncompressed digital signal. 71 . The method of claim 70 , wherein the function limits possible transitions between quantization levels of the uncompressed digital signal of consecutive samples of the uncompressed digital signal in order to minimize degradation to the compressed digital signal. 72 . The method of claim 66 , further comprising a processing circuit for decompressing the compressed digital signal. 73 . The method of claim 66 , further comprising: transmitting the compressed digital signal; storing one or more transmitted compressed digital samples of the compressed digital signal in order of transmission; and re-transmitting the one or more transmitted compressed digital samples in response to an error in transmission of the compressed digital signal. 74 . The method of claim 73 , further comprising processing at least one of the uncompressed digital signal and the compressed digital signal to perform voice detection. 75 . The method of claim 73 , further comprising processing at least one of the uncompressed digital signal and the compressed digital signal to detect the presence of ultrasonic energy in the input signal. 76 . The method of claim 73 , further comprising processing at least one of the uncompressed digital signal and the compressed digital signal to determine mel-frequency cepstral coefficients of the input signal. 77 . The method of claim 73 , further comprising determining a number of bits comprising the compressed digital signal based on the characteristic of the input signal. 78 . The method of claim 73 , further comprising setting the number of bits to a first number if the input signal has energy above a particular frequency and setting the number of bits to a second number if the input signal lacks energy above the particular frequency. 79 . An integrated circuit comprising: a digital compression circuit configured to receive an uncompressed digital signal and compress the uncompressed digital signal into a compressed digital signal having fewer quantization levels than that of the uncompressed digital signal, wherein for each given sample of the uncompressed digital signal, the digital compression circuit generates a corresponding sample of the compressed digital signal based on at least a first quantization level transition between the given sample and a first previous sample sampled consecutively previous to the given sample and a second quantization level transition between the first previous sample and a second previous sample sampled consecutively previous to the first previous sample; and a digital processing circuit for processing at least one of the uncompressed digital signal and the compr

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Classifications

  • Multiplexed conversion systems · CPC title

  • with lower resolution, e.g. single bit, feedback · CPC title

  • Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters · CPC title

  • Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

  • Detection of presence or absence of voice signals (switching of direction of transmission by voice frequency in two-way loud-speaking telephone systems H04M9/10) · CPC title

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What does patent US2017194012A1 cover?
A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal, a multi-bit quantizer configured to quantize the intermediate signal into an uncompressed digita…
Who is the assignee on this patent?
Cirrus Logic Inc, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification G10L19/032. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jul 06 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).