Display panel and inspection method thereof

Patent metadata

Field	Value
Publication number	US-2017193872-A1
Application number	US-201615373542-A
Country	US
Kind code	A1
Filing date	Dec 9, 2016
Priority date	Dec 31, 2015
Publication date	Jul 6, 2017
Grant date	—

Abstract

A display panel is discussed. The display panel according to an embodiment includes driver integrated circuits (ICs); data lines disposed in an active region; input pads disposed in a pad region; output pads disposed in a first inspection circuit included in the pad region, the output pads receiving first signals from the input pads; and a first switching circuit disposed in the first inspection circuit and connected to the output pads. The first switching circuit is configured to supply the first signals to the data lines. The display panel further includes first signal lines configured to supply the first signals to the output pads; a second switching circuit disposed in a second inspection circuit and connected to the data lines in the active region; and a second signal line configured to supply second signals to the second switching circuit.

First claim

What is claimed is:

1 . A display panel comprising:
driver integrated circuits (ICs); a plurality of data lines disposed in an active region; a plurality of input pads disposed in a pad region and configured to supply a plurality of first signals to the driver ICs; a plurality of output pads disposed in a first inspection circuit included in the pad region, the output pads receiving the first signals from the input pads via the driver ICs; a first switching circuit disposed in the first inspection circuit included in the pad region and connected to the output pads, wherein the first switching circuit is configured to supply the first signals to the data lines via the output pads; a plurality of first signal lines configured to supply the first signals to the output pads via the first switching circuit; a second switching circuit disposed in a second inspection circuit and connected to the data lines in the active region; and a second signal line configured to supply a plurality of second signals to the second switching circuit.

2 . The display panel according to claim 1 , wherein the output pads are connected to the data lines via link lines.

3 . The display panel according to claim 1 , wherein the first switching circuit is positioned at a bottom side of the active region, and the second switching circuit is positioned at a left, right, or top side of the active region.

4 . The display panel according to claim 1 , wherein the second signals supplied by the second switching circuit are in a direction opposite to a direction of the first signals supplied by the first switching circuit.

5 . The display panel according to claim 1 , wherein predetermined output pads among the output pads are used as dummy pads.

6 . The display panel according to claim 5 , wherein the second switching circuit commonly supplies the second signals from the second signal line to the data lines.

7 . The display panel according to claim 1 , wherein the first signals comprise red, green, and blue signals supplied to the first signal lines for displaying each of red, green, and blue color patterns, respectively.

8 . The display panel according to claim 1 , wherein the second signals supplied to the gate signal lines comprise red, green, and blue signals for displaying a gray-scale pattern.

9 . The display panel according to claim 1 , wherein the first signals are sequentially supplied to the data lines.

10 . The display panel according to claim 1 , wherein the output pads of the first inspection circuit are grouped into a plurality of output pad groups, and at least one dummy output pad is disposed between adjacent output pad groups.

11 . The display panel according to claim 10 , wherein a resistance difference between first and second output pad groups among the output pad groups is different than a resistance difference between the second output pad group and a third output pad group among the output pad groups.

12 . The display panel according to claim 1 , further comprising:
a first pad positioned in a non-active region to connect to a first data enable circuit; a second pad positioned in the non-active region to connect to a second data enable circuit; and a plurality of third pads positioned in the non-active region to connect to the first signal lines, respectively.

13 . A display panel comprising:
a plurality of data lines and a plurality of gate lines disposed in an active region, the data lines crossing the gate lines to define a pixel region; a plurality of input pads disposed in a non-active region; a plurality of output pads configured to receive a plurality of first signals from the input pads; a first data enable circuit disposed in a first region and configured to supply the first signals to the data lines via the output pads; and a second data enable circuit disposed in a second region and configured to supply a plurality of second signals to the data lines, wherein the first signals comprise red, green, and blue signals for displaying each of red, green, and blue color patterns, respectively, and wherein the second signals comprise red, green, and blue signals for displaying a gray-scale pattern.

14 . The display panel according to claim 13 , further comprising:
a plurality of first signal lines configured to supply the first signals to the output pads via the first data enable circuit; and a second signal line configured to supply the second signals to the second data enable circuit.

15 . The display panel according to claim 14 , wherein the first and second signal lines are disposed on a same layer as the gate lines to connect to the first and second data enable circuits, respectively.

16 . The display panel according to claim 13 , wherein the first data enable circuit is positioned at a bottom side of the active region, and the second data enable circuit is positioned at a left, right, or top side of the active region.

17 . The display panel according to claim 16 , wherein the second signals supplied by the second data enable circuit are in a direction opposite to a direction of the first signals supplied by the first data enable circuit.

18 . The display panel according to claim 17 , wherein the output pads are included in the first region and are grouped into a plurality of output pad groups, and
wherein at least one dummy output pad is disposed between adjacent output pad groups.

19 . The display panel according to claim 18 , wherein a resistance difference between first and second output pad groups among the output pad groups is different than a resistance difference between the second output pad group and a third output pad group among the output pad groups.

20 . The display panel according to claim 13 , further comprising:
a first pad positioned in the non-active region to connect to the first data enable circuit; a second pad positioned in the non-active region to connect to the second data enable circuit; and a plurality of third pads positioned in the non-active region to connect to the first signal lines, respectively.

Assignees

• Lg Display Co Ltd

Inventors

• Lee Junyeob

Classifications

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G2320/0223

  Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

• G09G2330/12

  Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title

• G09G3/2003

  Display of colours (specific for liquid crystal displays G09G3/3607) · CPC title