Display Device with Built-In Touch Screen and Method of Fabricating the Same

US2017192571A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017192571-A1
Application numberUS-201615382374-A
CountryUS
Kind codeA1
Filing dateDec 16, 2016
Priority dateDec 31, 2015
Publication dateJul 6, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed is a display device with a built-in touch screen. The display device includes a gate electrode and a pixel electrode on a substrate, an activation layer and a sensing contact portion, a source electrode and a drain electrode, and a gate insulation layer provided between the gate electrode and the activation layer and between the pixel electrode and the sensing contact portion. Thereby, it is possible to reduce the number of data lines arranged in the display panel. Also disclosed is a method of fabricating a display device with a built-in touch screen. The method includes forming a first gate electrode and a pixel electrode according to a first mask process, and forming an activation layer, a source electrode, a drain electrode, and a touch sensing line according to a second mask process. Thereby, it is possible to reduce the number of mask processes.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device, the display device comprising: a gate line extending along a first direction on a substrate; a data line extending along a second direction directly on an insulation layer on the substrate; a subpixel at an intersection of the gate line and the data line, the subpixel including: a pixel electrode, a transistor including: a gate electrode on the substrate, a part of the insulation layer on the gate electrode, a semiconductor layer on the part of the gate insulation layer, a drain electrode on the semiconductor layer, the drain electrode electrically connected to the pixel electrode, and a source electrode on the semiconductor layer, the source electrode electrically connected to the data line, a common electrode overlapping with the pixel electrode; and a touch sensing line directly on the insulation layer, the touch sensing line electrically connected to the common electrode. 2 . The display device of claim 1 , wherein the data line does not overlap with the touch sensing line. 3 . The display device of claim 1 , wherein the touch sensing line is disposed in between the data line and another data line. 4 . The display device of claim 1 , wherein the data line is disposed between the subpixel and another subpixel having another transistor, and wherein the data line is electrically connected to the transistor of the subpixel and the another transistor of the another subpixel. 5 . The display device of claim 1 , wherein a part of the touch sensing line is of a same material as a part of the data line. 6 . The display device of claim 1 , wherein a part of the touch sensing line is of a same material as the semiconductor layer. 7 . The display device of claim 1 , wherein a part of the touch sensing line is of a same material as the source electrode and the drain electrode. 8 . The display device of claim 1 , further comprising a first protective layer between the common electrode and the touch sensing line, and wherein the touch sensing line is electrically connected to the common electrode through a contact hole in the first protective layer. 9 . The display device of claim 1 , wherein the pixel electrode is disposed between the substrate and the insulation layer. 10 . The display device of claim 9 , wherein a part of the pixel electrode is of a same material as a part of the gate electrode. 11 . The display device of claim 1 , wherein the touch sensing line extends along the second direction. 12 . A method of fabricating a display device, the method comprising: forming a gate line on a substrate, the gate line extending in a first direction; forming a gate electrode and a pixel electrode on the substrate; forming a gate insulation layer over the gate line, the gate electrode, and the pixel electrode; forming a semiconductor layer on the gate insulation layer, the semiconductor layer overlapping with a part of the gate electrode; forming at least a part of the data line and at least a part of the touch sensing line on the gate insulation layer according to a first mask process; forming a source electrode and a drain electrode on the semiconductor layer, the drain electrode electrically connected to the pixel electrode and the source electrode electrically connected to the data line; and forming a common electrode overlapping with the pixel electrode, the common electrode electrically connected to the touch sensing line, wherein the gate electrode, the gate insulation layer, the semiconductor layer, the source electrode, and the drain electrode form a transistor, and wherein the transistor and the pixel electrode form a subpixel. 13 . The method of claim 12 , wherein the data line does not overlap with the touch sensing line. 14 . The method of claim 12 , further comprising forming at least a part of another data line according to the first mask process, and wherein the touch sensing line is disposed in between the data line and the another data line. 15 . The method of claim 12 , further comprising forming another subpixel including another transistor, wherein the data line is disposed between the subpixel and the another subpixel, and wherein the data line is electrically connected to the another transistor of the another subpixel. 16 . The method of claim 12 , wherein the semiconductor layer is formed according to the first mask process. 17 . The method of claim 12 , wherein the source electrode and the drain electrode are formed according to the first mask process. 18 . The method of claim 12 , further comprising: forming a protective layer on the touch sensing line and the pixel electrode; and forming a first contact hole that exposes a portion of the pixel electrode and a second contact hole that exposes a portion of the touch sensing line in the protective layer according to a second mask process. 19 . The method of claim 18 , further comprising forming a first contact portion in the first contact hole that electrically connects the drain electrode and the pixel electrode, and wherein the first contact portion and the common electrode are formed simultaneously according to a third mask process. 20 . The method of claim 18 , further comprising forming a second contact portion in the second contact hole that electrically interconnects the touch sensing line and the common electrode, and wherein the second contact portion and the common electrode are formed simultaneously according to a third mask process. 21 . The method of claim 12 , wherein the gate line, the gate electrode, and the pixel electrode are formed simultaneously according to a second mask process.

Assignees

Inventors

Classifications

  • Input devices, e.g. touch panels · CPC title

  • Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes · CPC title

  • for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS] · CPC title

  • characterised by their geometrical arrangement · CPC title

  • G06F3/0412Primary

    Digitisers structurally integrated in a display · CPC title

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What does patent US2017192571A1 cover?
Disclosed is a display device with a built-in touch screen. The display device includes a gate electrode and a pixel electrode on a substrate, an activation layer and a sensing contact portion, a source electrode and a drain electrode, and a gate insulation layer provided between the gate electrode and the activation layer and between the pixel electrode and the sensing contact portion. Thereby…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/0412. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jul 06 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).