Parallelization method, parallelization tool, and in-vehicle apparatus

Patent metadata

Field	Value
Publication number	US-2017168790-A1
Application number	US-201615350368-A
Country	US
Kind code	A1
Filing date	Nov 14, 2016
Priority date	Dec 10, 2015
Publication date	Jun 15, 2017
Grant date	—

Abstract

A method is for generating a parallel program for a multicore microcomputer from processes in a single program for a single core. The method includes extraction procedure, association procedure, and analysis procedure. The extraction procedure extracts (i) an extracted address of an accessed data item, which is among data items stored in a storage area together with the processes and accessed when each process is executed and (ii) an extracted symbol name of the accessed data item. The association procedure associates an associated address in the storage area storing the accessed data item of the extracted symbol name with the extracted symbol name. The analysis procedure analyzes a dependency between each process based on the extracted address and the associated address, and determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.

First claim

What is claimed is:

1 . A parallelization method of generating a parallel program parallelized for a multicore microcomputer having a plurality of cores from a plurality of processes in a single program for a single core microcomputer having one core,
the parallelization method comprising: an extraction procedure that extracts an extracted address and an extracted symbol name, the extracted address being an address of an accessed data item, the accessed symbol name being a symbol name of the accessed data item,
the accessed data item being among a plurality of data items that are stored in a storage area together with the plurality of processes and being accessed when each process is executed;
an association procedure that associates an associated address with the extracted symbol name, the associated address being an address in the storage area that stores the accessed data item of the extracted symbol name; and an analysis procedure that
analyzes a dependency between each process based on subject addresses that are the extracted address and the associated address to determine parallelizable processes from the plurality of processes, and
determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.

2 . The parallelization method according to claim 1 , wherein the subject addresses upon which a dependency is analyzed include an address in a register of the storage area.

3 . The parallelization method according to claim 1 , wherein the subject addresses upon which a dependency is analyzed include an address in a result of compile of the single program and address mapping of each data item.

4 . A parallelization tool including a computer to generate a parallel program parallelized for a multicore microcomputer having a plurality of cores from a plurality of processes in a single program for a single core microcomputer having one core,
the parallelization tool comprising: a symbol and address extractor that extracts an extracted address and an extracted symbol name, the extracted address being an address of an accessed data item, the accessed symbol name being a symbol name of the accessed data item,
the accessed data item being among a plurality of data items that are stored in a storage area together with the plurality of processes and being accessed when each process is executed;
a symbol association processor that associates an associated address with the extracted symbol name, the associated address being an address in the storage area that stores the accessed data item of the extracted symbol name; and a dependency analyzer that
analyzes a dependency between each process based on subject addresses that are the extracted address and the associated address to determine parallelizable processes from the plurality of processes, and
determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.

5 . The parallelization tool according to claim 4 , wherein
the subject addresses upon which a dependency is analyzed includes an address in a register of the storage area.

6 . The parallelization tool according to claim 4 , wherein
the subject addresses upon which a dependency is analyzed includes an address in a result of compile of the single program and address mapping of each data item.

7 . An in-vehicle apparatus including (i) a multicore microcomputer having a plurality of cores and (ii) a parallel program parallelized from a plurality of processes in a single program for a single core microcomputer having one core for the multicore microcomputer,
the parallel program being generated by: extracting an extracted address and an extracted symbol name, the extracted address being an address of an accessed data item, the accessed symbol name being a symbol name of the accessed data item,
the accessed data item being among a plurality of data items that are stored in a storage area together with the plurality of processes and being accessed when each process is executed;
associating an associated address with the extracted symbol name, the associated address being an address in the storage area that stores the accessed data item of the extracted symbol name; and analyzing a dependency between each process based on subject addresses that are the extracted address and the associated address to determine parallelizable processes from the plurality of processes, and determining that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency, wherein: the parallel program allocates the plurality of processes to the plurality of cores respectively; and a subject core that is any one of the cores of the multicore microcomputer executes any process that is allocated to the subject core itself.

8 . The in-vehicle apparatus according to claim 7 , wherein
the subject addresses upon which a dependency is analyzed include an address in a register of the storage area.

9 . The in-vehicle apparatus according to claim 7 , wherein
the subject addresses upon which a dependency is analyzed include an address in a result of compile of the single program and address mapping of each data item.

Assignees

• Denso Corp

Inventors

• Mineda Kenichi

Classifications

• G06F8/456 Primary

  Parallelism detection · CPC title