Scalable fixed-footprint capacitor structure

Patent metadata

Field	Value
Publication number	US-2017154951-A1
Application number	US-201514955882-A
Country	US
Kind code	A1
Filing date	Dec 1, 2015
Priority date	Dec 1, 2015
Publication date	Jun 1, 2017
Grant date	—

Abstract

In one embodiment, a capacitor structure includes a substrate, a dielectric stack, a first conductor segment, a second conductor segment and a shielding conductor segment. The dielectric stack is formed on the substrate. A first layer of the dielectric stack includes a plurality of conductor segments routed only in a first direction. A first conductor segment among the multiple conductor segments may be biased to a first voltage. The second conductor segment among the multiple conductor segments may be biased to a second voltage. The shielding conductor segment may be biased to the second voltage and is formed at an end of the first conductor segment. In addition to that, the capacitances for the capacitor structure may be adjusted while the footprint of the capacitor structure is fixed.

First claim

1 . A capacitor structure, comprising:
a substrate; and a dielectric stack formed on the substrate, wherein the dielectric stack comprises a first layer that includes a plurality of conductor segments routed only in a first direction, wherein the plurality of conductor segments comprises:
a first conductor segment that is biased to a first voltage, wherein the first conductor has opposing first and second ends;
a second conductor segment that is biased to a second voltage that is different than the first voltage; and
a shielding conductor segment that is biased to the second voltage, wherein the shielding conductor segment is adjacent to the first end of the first conductor segment, and wherein the first end of the first conductor segment is separate from the shielding conductor segment.

2 . The capacitor structure as defined in claim 1 , wherein the plurality of conductor segments further comprises:
a third conductor segment that is biased to the first voltage, wherein the second conductor segment is located between the first and third conductor segments; and an additional shielding conductor segment that is formed at an end of the third conductor segment.

3 . The capacitor structure as defined in claim 1 , wherein the first layer is one of a plurality of layers within the dielectric stack that is further away from the substrate relative to other layers within the dielectric stack.

4 . The capacitor structure as defined in claim 1 , wherein the dielectric stack comprises a second layer that includes a plurality of conductor segments routed only in a second direction, wherein the first direction is different than the second direction, wherein the plurality of conductor segments in the second layer comprises:
a fourth conductor segment that is biased to the first voltage.

5 . The capacitor structure as defined in claim 4 , the plurality of conductor segments in the second layer further comprising:
a fifth conductor segment that is biased to the second voltage.

6 . The capacitor structure as defined in claim 5 , the plurality of conductor segments in the second layer further comprising:
a sixth conductor segment that is biased to the first voltage, wherein the fifth conductor segment is interposed between the fourth and sixth conductor segments.

7 . The capacitor structure as defined in claim 6 , further comprising:
additional shielding conductor segments formed at ends of the fourth and sixth conductor segments.

8 . The capacitor structure as defined in claim 4 , wherein the first direction is perpendicular to the second direction.

9 . An integrated circuit, comprising:
a semiconductor substrate; a plurality of interconnect layers formed on the semiconductor substrate; a first plurality of conductive structures that is routed in a first direction within a first metal layer in the plurality of interconnect layers and that is biased to a first voltage; an additional conductive structure that is routed in the first direction within the first metal layer in the plurality of interconnect layers and that is biased to a second voltage that is different from the first voltage, wherein the additional conductive structure is adjacent to an end of one of the first plurality of conductive structures and is separate from the end; a second plurality of conductive structures routed in a second direction within a second metal layer in the plurality of interconnect layers and that is biased to the first voltage; and a conductive via that couples an overlapping portion of a conductive structure in the first plurality of conductive structures to a conductive structure in the second plurality of conductive structures.

10 . The integrated circuit as defined in claim 9 , wherein the first and second metal layers are adjacent metal layers.

11 . The integrated circuit as defined in claim 9 , wherein the first direction is perpendicular to the second direction.

12 . The integrated circuit as defined in claim 9 , further comprising:
a third plurality of conductive structures formed in the first metal layer in the plurality of interconnect layers, wherein the third plurality of conductive structures are routed in the first direction and are biased to the second voltage.

13 . The integrated circuit as defined in claim 12 , further comprising:
a fourth plurality of conductive structures formed in the second metal layer in the plurality of interconnect layers, wherein the fourth plurality of conductive structures are routed in the second direction and are biased to the second voltage.

14 . The integrated circuit as defined in claim 13 , further comprising:
an additional conductive via that couples an overlapping portion of a conductive structure within the third plurality of conductive structures to a conductive structure within the fourth plurality of conductive structures.

15 . A method of adjusting capacitance of a fixed-footprint capacitor structure formed in a plurality of interconnect layers that includes first and second conductor segments routed in a first direction and shielding conductor segments routed in the first direction, wherein each of the shielding conductor segments is adjacent to the first and second conductor segments, and wherein the first and second conductor segments are biased to different voltages, the method comprising:
comparing a capacitance value of the fixed-footprint capacitor structure to a predefined capacitance value; and in response to comparing the capacitance value, adjusting lengths of the first and second conductor segments.

16 . The method as defined in claim 15 , wherein the adjusting of the lengths further comprises:
in response to determining that the capacitance value of the fixed-footprint capacitor structure is less than the predefined capacitance value, increasing the lengths of the first and second conductor segments.

17 . The method as defined in claim 15 , wherein the adjusting of the lengths further comprises:
in response to determining that the capacitance value of the fixed-footprint capacitor structure is greater than the predefined capacitance value, decreasing the lengths of the first and second conductor segments.

18 . The method as defined in claim 15 , wherein the adjusting of the lengths further comprises:
changing a photolithography mask that forms the metal layer that includes the first and second conductor segments to another photolithography mask.

19 . The method as defined in claim 15 , wherein the fixed-footprint capacitor structure further comprises third and fourth conductor segments that are formed in a different interconnect layer than the first and second conductor segments, wherein the third and fourth conductor segments are routed in a second direction and additional shielding conductor segments are routed in the second direction, wherein each of the additional shielding conductor segments are located adjacent to the third and fourth conductor segments, the method further comprising:
in response to determining that the capacitance value of the fixed-footprint capacitor structure is lower than the predefined capacitance value, increasing an amount of overlap between portions of the first and second conductor segments and portions of the third and fourth conductor segments.

20 . The method as defined in claim 19 , further comprising:
in response to determining that the capacitance value of the fixed-footprint capacitor structure is greater than the predefined capacitance value, reducing the amount of overlap betwe

Assignees

• Altera Corp

Inventors

• Cui Yan
• Lim Queennie Suan Imm
• Chen Shuxian

Classifications

• H10W42/20

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

• H10W20/496

  Capacitor integral with wiring layers · CPC title

• H10W20/423

  Shielding layers · CPC title

• H10W20/031

  of conductive parts of the interconnections · CPC title

• H10W20/495 Primary

  Capacitive arrangements or effects of, or between wiring layers · CPC title