Irregular Low Density Parity Check Processing System With Non-Uniform Scaling

US2017149445A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017149445-A1
Application numberUS-201514949677-A
CountryUS
Kind codeA1
Filing dateNov 23, 2015
Priority dateNov 23, 2015
Publication dateMay 25, 2017
Grant date

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Abstract

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An apparatus for decoding data includes a data decoding circuit configured to decode data encoded with an irregular low density parity check code based on a parity check matrix with non-uniform column weights, and at least one scaling circuit configured to scale values in the data decoding circuit with a scaling value that is dependent at least in part on a column weight of the likelihood values being scaled.

First claim

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What is claimed is: 1 . An apparatus for decoding data, comprising: a data decoding circuit configured to decode data encoded with an irregular low density parity check code comprising a parity check matrix with non-uniform column weights; and at least one scaling circuit configured to scale values in the data decoding circuit with a scaling value that is dependent at least in part on a column weight of the likelihood values being scaled. 2 . The apparatus of claim 1 , the data decoding circuit comprising a low density parity check decoder and a data detector configured to apply a data detection algorithm to the data, wherein data decoding applied by the low density parity check decoder and the data detection algorithm applied by the data detector are performed in iterative fashion. 3 . The apparatus of claim 2 , wherein the at least one scaling circuit is configured to scale the likelihood values in the data decoding circuit with the scaling value that is dependent at least in part on a number of global decoding and detection iterations in the low density parity check decoder and the data detector. 4 . The apparatus of claim 2 , wherein the at least one scaling circuit is connected between an output of the low density parity check decoder and an input of the data detector. 5 . The apparatus of claim 4 , wherein the at least one scaling circuit is operable to scale extrinsic messages from the data detector. 6 . The apparatus of claim 2 , further comprising a bit selective scaling circuit configured to scale an output of the data detector. 7 . The apparatus of claim 6 , further comprising a first subtraction circuit between the data detector and the bit selective scaling circuit configured to subtract an output of the at least one scaling circuit from the output of the data detector, and further comprising a second subtraction circuit between the low density parity check decoder and the at least one scaling circuit configured to subtract an output of the bit selective scaling circuit from an output of the low density parity check decoder. 8 . The apparatus of claim 1 , the data decoding circuit comprising a low density parity check decoder, wherein the at least one scaling circuit is located in the low density parity check decoder. 9 . The apparatus of claim 8 , wherein the values comprise log likelihood ratios. 10 . The apparatus of claim 8 , wherein the at least one scaling circuit is in a check node unit in the low density parity check decoder. 11 . The apparatus of claim 8 , wherein the low density parity check decoder comprises a min-sum based decoder, and wherein the check node unit comprises a min1, min2 and index of min1 detection circuit and a check node to variable node message generation circuit, wherein the at least one scaling circuit is configured to scale the min1, min2 in the check node to variable node message generation circuit. 12 . The apparatus of claim 8 , wherein the low density parity check decoder comprises a layer decoder, and wherein the at least one scaling circuit comprises a plurality of scaling circuits to scale likelihood messages for different layers. 13 . A method of decoding data, comprising: decoding data encoded with an irregular low density parity check code comprising a parity check matrix with non-uniform column weights; and applying non-uniform scaling to likelihood values for the data during the decoding, wherein scaling factors for the non-uniform scaling are determined based at least in part on the column weights. 14 . The method of claim 13 , wherein the decoding and the applying non-uniform scaling comprise: generating variable node to check node messages based on perceived values of variable nodes in an H matrix; generating check node to variable node messages based on the variable node to check node messages by finding a minimum and a second minimum of Q values in the variable node to check node messages, applying non-uniform scaling to the minimum and the second minimum of Q values, and generating the check node to variable node messages based at least in part on the non-uniformly scaled minimum and second minimum values; and updating the perceived values of the variable nodes based on the check node to variable node messages. 15 . The method of claim 13 , wherein applying the non-uniform scaling to likelihood values comprises scaling an output of an irregular low density parity check decoder. 16 . The method of claim 13 , wherein the decoding comprises applying a data detection algorithm to the data in a data detector circuit and applying a data decoding algorithm in an irregular low density parity check decoder in an iterative process. 17 . The method of claim 16 , wherein the scaling factors for the non-uniform scaling are determined based at least in part on an iteration number. 18 . The method of claim 16 , further comprising applying bit selective scaling to an output of the data detector circuit. 19 . An irregular low density parity check decoding system comprising: means for decoding data encoded with an irregular low density parity check code; and means for scaling likelihood values in the means for decoding data, wherein scaling values applied by the means for scaling the likelihood values are determined based on column weights in the irregular low density parity check code. 20 . The irregular low density parity check decoding system of claim 19 , wherein the means for decoding data comprises a min-sum based low density parity check layer decoder, and wherein the likelihood values comprises minimum and next minimum values.

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Classifications

  • Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes · CPC title

  • Shuffled, staggered, layered or turbo decoding schedules · CPC title

  • H03M13/112Primary

    with correction functions for the min-sum rule, e.g. using an offset or a scaling factor · CPC title

  • Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations · CPC title

  • with Low Density Parity Check [LDPC] codes · CPC title

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What does patent US2017149445A1 cover?
An apparatus for decoding data includes a data decoding circuit configured to decode data encoded with an irregular low density parity check code based on a parity check matrix with non-uniform column weights, and at least one scaling circuit configured to scale values in the data decoding circuit with a scaling value that is dependent at least in part on a column weight of the likelihood value…
Who is the assignee on this patent?
Avago Technologies General Ip
What technology area does this patent fall under?
Primary CPC classification H03M13/112. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).