Microelectronic device

Patent metadata

Field	Value
Publication number	US-2017133708-A1
Application number	US-201615343650-A
Country	US
Kind code	A1
Filing date	Nov 4, 2016
Priority date	Nov 6, 2015
Publication date	May 11, 2017
Grant date	—

Abstract

This invention relates to a microelectronic device comprising: a first support ( 1 ), a second support ( 2 ), first respective faces of the first support and second support ( 1, 2 ) being arranged opposite, and a sealing layer ( 4 ) between said first faces, characterized in that the sealing layer ( 4 ) comprises at least one layer of an ionic conductive material of formula Li x P y O z N w , with x strictly greater than 0 and less than or equal to 4.5, y strictly greater than 0 and less than or equal to 1, z strictly greater than 0 and less than or equal to 5.5, w greater than or equal to 0 and less than or equal to 1.

First claim

1 . A microelectronic device comprising a first support having a first face, a second support having another first face, the first faces being arranged opposite, and a sealing layer between said first faces,
wherein the sealing layer comprises at least one layer of an ionic conductive material of formula Li x P y O z N w , with x strictly greater than 0 and less than or equal to 4.5, y strictly greater than 0 and less than or equal to 1, z strictly greater than 0 and less than or equal to 5.5, w greater than or equal to 0 and less than or equal to 1.

2 . The device according to claim 1 , wherein the first face of at least one among the first support and the second support carries at least one electronic component.

3 . The device according to claim 1 , comprising a hermetic cavity delimited by the first face of the first support, the first face of the second support and the sealing layer, said at least electronic component, being encapsulated in said cavity, with the device comprising preferably a getter in the cavity.

4 . The device according to claim 2 wherein the electronic component comprises a layer of Li x P y O z N w formed from the same layer of an ionic conductive material of formula Li x P y O z N w as the sealing layer, more preferably in order to form one among: a micro-battery, an electrochromic component.

5 . The device according to claim 1 comprising a barrier layer; with at least one portion of the barrier layer being arranged on an external flank of the sealing layer.

6 . The device according to claim 1 comprising a barrier layer and wherein at least one portion of the barrier layer is arranged on an internal flank of the sealing layer.

7 . The device according to claim 1 comprising an intermediate barrier layer positioned between two portions of the sealing layer.

8 . The device according to claim 1 wherein at least one among x, y, z, w of the compound Li x P y O z N w varies along a thickness dimension of the sealing layer.

9 . The device according to claim 8 , wherein a composition gradient w/y changes from a minimum value on a bonding interface of the sealing layer in contact with one among the first support and the second support having a highest thermal expansion coefficient to a maximum value on a bonding interface of the sealing layer in contact with an other support among the first support and the second support having a least thermal expansion coefficient.

10 . The device according to claim 1 comprising a second sealing layer in order to assemble the first support with a second additional support; the second sealing layer comprises at least one layer of an ionic conductive material of formula Li x1 P y1 O z1 N w1 , with x1 strictly greater than 0 and less than or equal to 4.5, y1 strictly greater than 0 and less than or equal to 1, z1 strictly greater than 0 and less than or equal to 5.5, w1 greater than or equal to 0 and less than or equal to 1, and more preferably wherein the sealing layer and the second sealing layer have different chemical compositions.

11 . A method for carrying out a microelectronic device comprising a first support, a second support, first respective faces of the first support and second support being arranged opposite, with the method comprising forming a sealing layer between said first faces,
characterized wherein the sealing layer comprises at least one layer of an ionic conductive material of formula Li x P y O z N w , with x strictly greater than 0 and less than or equal to 4.5, y strictly greater than 0 and less than or equal to 1, z strictly greater than 0 and less than or equal to 5.5, w greater than or equal to 0 and less than or equal to 1.

12 . The method according to claim 11 wherein, after the forming of the sealing layer, an anodic bonding is carried out by applying a voltage less than 100 volts and/or a temperature less than 150° C.

13 . The method according to claim 11 wherein the forming of the sealing layer is configured as to form a hermetic cavity delimited by the first face of the first support, the first face of the second support and the sealing layer, and more preferably wherein at least one among the first support and the second support carries on its first face at least one electronic component, and wherein the at least one electronic component is encapsulated in said cavity.

14 . The method according to claim 11 wherein at least one among the parameters x, y, z, w of the component Li x P y O z N w varies along a thickness dimension of the sealing layer, and more preferably, wherein a composition gradient w/y is formed that changes from a minimum value on a bonding interface of the sealing layer in contact with one among the first support and the second support having a highest thermal expansion coefficient to a maximum value on a bonding interface of the sealing layer in contact with an other support among the first support and the second support having a least thermal expansion coefficient.

15 . The use of an ionic conductive material of formula Li x P y O z N w , with x strictly greater than 0 and less than or equal to 4.5, y strictly greater than 0 and less than or equal to 1, z strictly greater than 0 and less than or equal to 5.5, w greater than or equal to 0 and less than or equal to 1, as a sealing layer for assembling a first support and a second support.

Assignees

• Commissariat Energie Atomique

Inventors

• Oukassi Sami
• Baillin Xavier

Classifications

• H01M4/08

  Processes of manufacture · CPC title

• B32B3/30

  characterised by a layer formed with recesses or projections, e.g. {hollows, grooves, protuberances, ribs (apertured layer B32B3/266; layer with cavities or internal voids B32B3/26)} · CPC title

• H01M4/0402

  Methods of deposition of the material · CPC title

• H01M10/058

  Construction or manufacture · CPC title

• B32B2307/202

  Conductive · CPC title