Polymer-Based-Semiconductor Structure with Cavity

Patent metadata

Field	Value
Publication number	US-2017125317-A1
Application number	US-201615144262-A
Country	US
Kind code	A1
Filing date	May 2, 2016
Priority date	Nov 4, 2015
Publication date	May 4, 2017
Grant date	—

Abstract

A structure includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die, and a cavity in the encapsulating material. The cavity penetrates through the encapsulating material.

First claim

1 . A structure comprising:
a device die; an encapsulating material encapsulating the device die therein; and a cavity in the encapsulating material, wherein the cavity penetrates through the encapsulating material.

2 . The structure of claim 1 further comprising:
a plurality of dielectric layers over the encapsulating material; and
redistribution lines in the plurality of dielectric layers, wherein the cavity further penetrates through the plurality of dielectric layers, with the cavity comprising a sidewall extending from a top surface of a topmost layer of the plurality of dielectric layers to a bottom surface of the encapsulating material.

3 . The structure of claim 2 further comprising:
a solder region at a top surface of the plurality of dielectric layers; and
a package component bonded to the solder region.

4 . The structure of claim 1 further comprising:
a conductive coil penetrating through the encapsulating material, wherein the cavity is encircled by the conductive coil.

5 . The structure of claim 4 further comprising a ferrite material disposed in the cavity.

6 . The structure of claim 1 further comprising a camera disposed in the cavity.

7 . The structure of claim 1 further comprising:
a dielectric layer underlying the encapsulating material, wherein the cavity further penetrates through the dielectric layer.

8 . A structure comprising:
a package comprising:
a device die;
an encapsulating material encapsulating the device die therein;
an inductor comprising:
a coil comprising a portion extending from a top surface to a bottom surface of the encapsulating material; and

at least one dielectric layer over the encapsulating material and the portion of the coil;
a plurality of redistribution lines in the at least one dielectric layer, wherein the inductor is electrically coupled to the device die through the plurality of redistribution lines; and
a cavity, wherein the cavity penetrates through the encapsulating material and the at least one dielectric layer.

9 . The structure of claim 8 , wherein the cavity extends from a top surface of a topmost layer in the at least one dielectric layer to the bottom surface of the encapsulating material.

10 . The structure of claim 8 , wherein the cavity has sidewalls perpendicular to the top surface and the bottom surface of the encapsulating material.

11 . The structure of claim 8 , wherein the cavity has slanted sidewalls neither perpendicular to nor parallel to the top surface and the bottom surface of the encapsulating material.

12 . The structure of claim 8 further comprising a ferrite material disposed in the cavity, wherein the cavity is encircled by the coil.

13 . The structure of claim 8 further comprising a camera disposed in the cavity.

14 . The structure of claim 8 further comprising a printed circuit board bonded to the package, wherein the printed circuit board covers the cavity.

15 .- 20 . (canceled)

21 . A structure comprising:
a first dielectric layer; a molding compound over and contacting the first dielectric layer; a device die encapsulated in the molding compound, wherein a top surface of the device die is substantially coplanar with a top surface of the molding compound; a plurality of second dielectric layers over the molding compound and the device die; a plurality of redistribution lines in the plurality of second dielectric layers; a cavity penetrating through the first dielectric layer, the molding compound, and the plurality of second dielectric layers; and a discrete feature inserted into the cavity.

22 . The structure of claim 21 , wherein the cavity has a substantially straight edge extending from a top surface of the plurality of second dielectric layers to a bottom surface of the first dielectric layer.

23 . The structure of claim 21 further comprising an adhesive film having a top surface contacting a back surface of the device die, and a bottom surface contacting a top surface of the first dielectric layer.

24 . The structure of claim 21 further comprising a coil penetrating through the molding compound, wherein the coil encircles the cavity.

25 . The structure of claim 21 , wherein the discrete feature comprises a camera.

26 . The structure of claim 21 , wherein the discrete feature comprises a ferrite material.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Kuo Hung-Yi
• Yu Chen-Hua
• Tsai Hao-Yi

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W74/019

  using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title