Receiving apparatus and decoding method thereof

US2017111198A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017111198-A1
Application numberUS-201615297495-A
CountryUS
Kind codeA1
Filing dateOct 19, 2016
Priority dateOct 19, 2015
Publication dateApr 20, 2017
Grant date

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  5. First independent claim

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Abstract

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A receiving apparatus includes: a first decoder configured to decode a signal transmitted through a first layer from a layered division multiplexing (LDM) signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the first layer, using the parity check matrix to generate parity bits corresponding only to preset columns in the parity check matrix; and a second decoder configured to decode a signal obtained by removing, from the LDM signal, a signal corresponding to the LDPC information word bits generated by decoding the signal transmitted through the first layer, the parity bits generated by the encoder, and the parity bits generated by the first decoder except the parity bits generated by the encoder, thereby to generate information word bits transmitted through a second layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A receiving apparatus receiving and processing a layered division multiplexing (LDM) signal, the receiving apparatus comprising: a first decoder configured to decode a signal transmitted through a first layer from the LDM signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the first layer, using the parity check matrix to generate parity bits corresponding only to preset columns in the parity check matrix; and a second decoder configured to decode a signal obtained by removing, from the LDM signal, a signal corresponding to the LDPC information word bits generated by decoding the signal transmitted through the first layer, the parity bits generated by the encoder, and the parity bits generated by the first decoder except the parity bits generated by the encoder, thereby to generate information word bits transmitted through a second layer. 2 . The receiving apparatus as claimed in claim 1 , wherein the preset columns are columns having a degree of 1 in the parity check matrix. 3 . The receiving apparatus as claimed in claim 2 , wherein the parity check matrix comprises a first parity check matrix comprising a first information word partial matrix and a first parity partial matrix, which is a dual diagonal matrix, and a second parity check matrix comprising a second information word partial matrix and a second parity partial matrix which is a unit matrix, and wherein the encoder generates the parity bits corresponding only to the columns having the degree of 1 in the parity check matrix. 4 . The receiving apparatus as claimed in claim 1 , wherein the first decoder decodes the signal transmitted through the first layer from the LDM signal using a first LDPC decoder, and decodes the LDPC information word bits, corresponding to the signal transmitted through the first layer, using a first Bose, Chaudhuri, Hocquenghem (BCH) decoder to generate information word bits transmitted through the first layer. 5 . The receiving apparatus as claimed in claim 4 , wherein the encoder encodes the LDPC information word bits, corresponding to the signal transmitted through the first layer, using an LDPC encoder to generate the parity bits corresponding only to the preset columns in the parity check matrix. 6 . The receiving apparatus as claimed in claim 5 , wherein the encoder encodes the information word bits, transmitted through the first layer, using a BCH encoder to generate BCH parity bits, and wherein the LDPC encoder encodes the information word bits transmitted through the first layer and the BCH parity bits to generate the parity bits corresponding only to the preset columns in the parity check matrix. 7 . The receiving apparatus as claimed in claim 4 , wherein the second decoder decodes the signal obtained by the removing to generate LDPC information word bits and parity bits, corresponding to a signal transmitted through the second layer, using the first LDPC decoder, and decodes the LDPC information word bits, corresponding to the signal transmitted through the second layer, using the first BCH decoder to generate the information word bits transmitted through the second layer. 8 . The receiving apparatus as claimed in claim 4 , wherein the second decoder decodes the signal obtained by the removing to generate LDPC information word bits and parity bits, corresponding to a signal transmitted through the second layer, using a second LDPC decoder, and decodes the LDPC information word bits, corresponding to the signal transmitted through the second layer, using a second BCH decoder to generate the information word bits transmitted through the second layer. 9 . A decoding method of a receiving apparatus receiving and processing a layered division multiplexing (LDM) signal, the decoding method comprising: decoding a signal transmitted through a first layer from the LDM signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; encoding the LDPC information word bits, generated by decoding the signal transmitted through the first layer, using the parity check matrix to generate parity bits corresponding only to preset columns in the parity check matrix; and decoding a signal obtained by removing, from the LDM signal, a signal corresponding to the LDPC information word bits generated by decoding the signal transmitted through the first layer, the parity bits generated by the encoding, and the parity bits generated by the decoding except the parity bits generated by the encoding, thereby to generate information word bits transmitted through a second layer. 10 . The decoding method as claimed in claim 9 , wherein the preset columns are columns having a degree of 1 in the parity check matrix. 11 . The decoding method as claimed in claim 10 , wherein the parity check matrix comprises a first parity check matrix comprising a first information word partial matrix and a first parity partial matrix, which is a dual diagonal matrix, and a second parity check matrix comprising a second information word partial matrix and a second parity partial matrix, which is a unit matrix, and wherein the preset columns have the degree of 1 in the parity check matrix. 12 . The decoding method as claimed in claim 9 , wherein the decoding the signal transmitted through the first layer from the LDM signal comprises: generating the LDPC information word bits and the parity bits, corresponding to the signal transmitted through the first layer, using a first LDPC decoder; and decoding the LDPC information word bits, corresponding to the signal transmitted through the first layer, using a first Bose, Chaudhuri, Hocquenghem (BCH) decoder to generate information word bits transmitted through the first layer. 13 . The decoding method as claimed in claim 12 , wherein the generating the parity bits corresponding only to the preset columns comprises encoding the LDPC information word bits, corresponding to the signal transmitted through the first layer, using an LDPC encoder to generate the parity bits corresponding only to the preset columns in the parity check matrix. 14 . The decoding method as claimed in claim 13 , wherein the generating the parity bits corresponding only to the preset columns comprises: BCH encoding the information word bits transmitted through the first layer to generate BCH parity bits; and encoding the information word bits transmitted through the first layer and the BCH parity bits to generate the parity bits corresponding only to the preset columns in the parity check matrix. 15 . The decoding method as claimed in claim 12 , wherein the decoding the signal obtained by the removing comprises: generating LDPC information word bits and parity bits, corresponding to a signal transmitted through the second layer, using the first LDPC decoder; and decoding the LDPC information word bits, corresponding to the signal transmitted through the second layer, using the first BCH decoder to generate the information word bits transmitted through the second layer. 16 . The decoding method as claimed in claim 12 , wherein the decoding the signal obtained by the removing comprises: generating LDPC information word bits and parity bits, corresponding to a signal transmitted through the second layer, using a second LDPC decoder; and decoding the LDPC information word bits, corresponding to the signal transmitted through the second layer, us

Assignees

Inventors

Classifications

  • in conjunction with detection of multiuser or interfering signals, e.g. iteration between CDMA or MIMO detector and FEC decoder (for spatial equalizer H04L25/03286) · CPC title

  • H04N19/30Primary

    using hierarchical techniques, e.g. scalability (H04N19/63 takes precedence) · CPC title

  • in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes · CPC title

  • Arrangements at the receiver end · CPC title

  • Arrangements for detecting or preventing errors in the information received {(correcting synchronisation H04L7/00)} · CPC title

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What does patent US2017111198A1 cover?
A receiving apparatus includes: a first decoder configured to decode a signal transmitted through a first layer from a layered division multiplexing (LDM) signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the fir…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04N19/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).