Tamper-respondent assemblies

US2017094806A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017094806-A1
Application numberUS-201514941887-A
CountryUS
Kind codeA1
Filing dateNov 16, 2015
Priority dateSep 25, 2015
Publication dateMar 30, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods of fabricating tamper-respondent assemblies are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width W l ≦200 μm, as well as a line-to-line spacing width W s ≦200 μm. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.

First claim

Opening claim text (preview).

What is claimed is: 1 . A fabrication method comprising: fabricating a tamper-respondent assembly, the fabricating comprising: providing a tamper-respondent electronic circuit structure, the providing comprising providing a tamper-respondent sensor, the providing the tamper-respondent sensor comprising: providing at least one flexible layer having opposite first and second sides; and providing circuit lines forming at least one resistive network, the circuit lines being disposed on at least one of the first side or the second side of the at least one flexible layer, and the circuit lines having a line width W l ≦200 μm, and a line-to-line spacing width W s ≦200 μm. 2 . The fabrication method of claim 1 , wherein the circuit lines have line width W l ≦100 μm, and line-to-line spacing width W s ≦100 μm. 3 . The fabrication method of claim 1 , wherein the circuit lines include resistive circuit lines comprising a material, line width W l , and a line length L l which provide at least 1000 ohms resistance between ends per resistive circuit line. 4 . The fabrication method of claim 3 , wherein the material comprises at least one of conductive ink, copper, silver, silver carbon or nickel-phosphorus. 5 . The fabrication method of claim 1 , wherein the at least one flexible layer comprises at least one crystalline polymer layer having the opposite first and second sides with the circuit lines forming the at least one resistive network disposed thereon. 6 . The fabrication method of claim 5 , wherein the at least one crystalline polymer layer comprises at least one of polyvinylidene difluoride (PVDF), or Kapton. 7 . The fabrication method of claim 1 , wherein the tamper-respondent sensor comprises multiple flexible layers disposed in a stack, the at least one flexible layer being at least one flexible layer of the multiple flexible layers, and wherein the multiple flexible layers further comprise another flexible layer comprising a malleable metal film. 8 . The fabrication method of claim 7 , wherein the malleable metal film comprises copper or a copper alloy. 9 . The fabrication method of claim 1 , wherein the tamper-respondent sensor comprises multiple flexible layers disposed in a stack, the at least one flexible layer being at least one flexible layer of the multiple flexible layers, and wherein the multiple flexible layers comprise a first flexible layer having first circuit lines, of the circuit lines, and a second flexible layer having second circuit lines, of the circuit lines, the first circuit lines having a first line width W l ≦200 and the second circuit lines having a second line width W l ≦200 μm, wherein the first line width of the first circuit lines is different from the second line width of the second circuit lines. 10 . The fabrication method of claim 9 , wherein the first circuit lines are formed of a first material and the second circuit lines are formed of a second material, the first material of the first circuit lines being a different material from the second material of the second circuit lines. 11 . The fabrication method of claim 1 , wherein the tamper-respondent sensor further comprises multiple flexible layers disposed in a stack, the at least one flexible layer being at least one flexible layer of the multiple flexible layers, and wherein the multiple flexible layers further comprise a first flexible layer having first circuit lines, of the circuit lines, and a second flexible layer having second circuit lines, of the circuit lines, the first circuit lines being formed of a first material and the second circuit lines being formed of a second material, the first material of the first circuit lines being a different material from the second material of the second circuit lines. 12 . The fabrication method of claim 1 , further comprising providing an electronic enclosure to enclose, at least in part, at least one electronic component to be protected, the electronic enclosure comprising an outer surface, and wherein the tamper-respondent electronic circuit structure covers, at least in part, the outer surface of the electronic enclosure. 13 . The fabrication method of claim 1 , further comprising providing an electronic enclosure to enclose, at least in part, at least one electronic component to be protected, the electronic enclosure comprising an inner surface, and wherein the tamper-respondent sensor overlies, at least in part, the inner surface of the electronic enclosure. 14 . The fabrication method of claim 13 , further comprising: providing a multilayer circuit board, the at least one electronic component being associated with the multilayer circuit board; providing an embedded tamper-respondent sensor disposed within the multilayer circuit board; and providing an electronic enclosure to seal to the multilayer circuit board, and the tamper-respondent sensor covering, at least in part, the inner surface of the electronic enclosure, and the embedded tamper-respondent sensor within the multilayer circuit board facilitate defining a secure volume about the at least one electronic component.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

  • using active circuits · CPC title

  • Flexible insulating substrates · CPC title

  • Shapes or dispositions of interconnections · CPC title

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What does patent US2017094806A1 cover?
Methods of fabricating tamper-respondent assemblies are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. T…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H05K3/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 30 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).