Controlled growth of nanoscale wires

US2017073841A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017073841-A1
Application numberUS-201515308951-A
CountryUS
Kind codeA1
Filing dateMay 6, 2015
Priority dateMay 7, 2014
Publication dateMar 16, 2017
Grant date

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present invention generally relates to nanoscale wires, and to methods of producing nanoscale wires. In some aspects, the nanoscale wires are nanowires comprising a core which is continuous and a shell which may be continuous or discontinuous, and/or may have regions having different cross-sectional areas. In some embodiments, the shell regions are produced by passing the shell material (or a precursor thereof) over a core nanoscale wire under conditions in which Plateau-Raleigh crystal growth occurs, which can lead to non-homogenous deposition of the shell material on different regions of the core. The core and the shell each independently may comprise semiconductors, and/or non-semiconductor materials such as semiconductor oxides, metals, polymers, or the like. Other embodiments are generally directed to systems and methods of making or using such nanoscale wires, devices containing such nanoscale wires, or the like.

First claim

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What is claimed is: 1 . An article, comprising: a nanowire comprising a continuous core comprising a first longitudinal portion comprising a shell at least partially surrounding the core and having a substantially constant cross-sectional area, and a second longitudinal portion having a substantially constant cross-section area smaller than the first longitudinal portion, wherein the first longitudinal portion has a first dimension orthogonal to the core and a second dimension orthogonal to the first dimension and to the core, wherein an aspect ratio of the first dimension to the second dimension is at least about 1.5:1, and wherein the core and the shell material have different compositions. 2 . The article of claim 1 , wherein the core comprises a semiconductor. 3 . The article of any one of claim 1 or 2 , wherein the core comprises a metal. 4 . The article of any one of claims 1 - 3 , wherein the core comprises a dielectric. 5 . The article of any one of claims 1 - 4 , wherein the core comprises a semiconductor oxide. 6 . The article of any one of claims 1 - 5 , wherein the core comprises SiO 2 . 7 . The article of any one of claims 1 - 6 , wherein the shell comprises a plurality of discontinues shell regions. 8 . The article of claim 7 , wherein the plurality of discontinuous shell regions are substantially regularly longitudinally spaced. 9 . The article of claim 8 , wherein the plurality of discontinuous shell regions have a periodicity of less than about 20 micrometers. 10 . The article of any one of claim 8 or 9 , wherein the plurality of discontinuous shell regions have a periodicity of greater than about 200 nm. 11 . The article of any one of claims 8 - 10 , wherein the plurality of discontinuous shell regions have a periodicity of greater than about 500 nm. 12 . The article of any one of claims 7 - 11 , wherein the discontinuous shell regions are each separated by at least 5 nm. 13 . The article of any one of claims 7 - 12 , wherein the discontinuous shell regions comprise a longitudinal portion having a length of at least 5 nm and a substantially constant cross-sectional area. 14 . The article of claim 13 , wherein the discontinuous shell regions are each separated by a longitudinal portion of the nanowire having a length of at least 5 nm. 15 . The article of claim 14 , wherein the discontinuous shell regions further comprises a transitional portion having a length of at least 10 nm between the longitudinal portion and the longitudinal portion of the nanowire. 16 . The article of any one of claims 7 - 15 , wherein at least one of the discontinuous shell regions consists of a single crystal. 17 . The article of any one of claims 1 - 6 , wherein the shell is continuous. 18 . The article of any one of claims 1 - 17 , wherein the second longitudinal portion of the nanowire comprises the core and the shell. 19 . The article of any one of claims 1 - 18 , wherein the first longitudinal portion of the nanowire has a maximum dimension, orthogonal to the core, of less than about 1 micrometer. 20 . The article of any one of claims 1 - 19 , wherein the first longitudinal portion of the nanowire has a maximum dimension, orthogonal to the core, of less than about 500 micrometers. 21 . The article of any one of claims 1 - 21 , wherein the first longitudinal portion of the nanowire has a maximum dimension, orthogonal to the core, of less than about 250 micrometers. 22 . The article of any one of claims 1 - 21 , wherein the second longitudinal portion of the nanowire has a maximum dimension, orthogonal to the core, of less than about 150 micrometers. 23 . The article of any one of claims 1 - 22 , wherein the shell comprises Si. 24 . The article of any one of claims 1 - 23 , wherein the shell consists essentially of Si. 25 . The article of any one of claims 1 - 24 , wherein the shell comprises a semiconductor. 26 . The article of any one of claims 1 - 25 , wherein the shell comprises a metal. 27 . The article of any one of claims 1 - 26 , wherein the shell comprises a dielectric. 28 . The article of any one of claims 1 - 27 , wherein the shell comprises a semiconductor, and the core comprises a semiconductor, wherein the core and the shell semiconductors are distinguishable. 29 . The article of any one of claims 1 - 28 , wherein the core has an average diameter of less than about 1 micrometer. 30 . The article of any one of claims 1 - 29 , wherein the core has an average diameter of less than about 300 nm. 31 . The article of any one of claims 1 - 30 , wherein the core has an average diameter of less than about 100 nm. 32 . The article of any one of claims 1 - 31 , wherein the core has a variation in average diameter of less than about 20%. 33 . The article of any one of claims 1 - 32 , wherein the nanowire has a maximum dimension, orthogonal to the core, of less than about 1 micrometer. 34 . An article, comprising: a nanowire comprising a continuous semiconductor oxide core and a plurality of discontinuous semiconductor shell regions. 35 . The article of claim 34 , wherein the core comprises SiO 2 . 36 . The article of any one of claim 34 or 35 , wherein the plurality of discontinuous semiconductor shell regions are substantially regularly longitudinally spaced. 37 . The article of claim 36 , wherein the plurality of discontinuous semiconductor shell regions have a periodicity of less than about 20 micrometers. 38 . The article of any one of claim 36 or 37 , wherein the plurality of discontinuous semiconductor shell regions have a periodicity of greater than about 500 nm. 39 . The article of any one of claims 34 - 38 , wherein the discontinuous semiconductor shell regions are each separated by at least 5 nm. 40 . The article of any one of claims 34 - 39 , wherein the discontinuous semiconductor shell regions comprise a longitudinal portion having a length of at least 5 nm and a substantially constant cross-sectional area. 41 . The article of claim 40 , wherein the discontinuous semiconductor shell regions are each separated by a longitudinal portion of the nanowire having a length of at least 5 nm. 42 . The article of claim 41 , wherein the discontinuous semiconductor shell regions further comprises a transitional portion having a length of at least 10 nm between the longitudinal portion and the longitudinal portion of the nanowire. 43 . The article of any one of claims 34 - 42 , wherein at least one of the discontinuous semiconductor shell regions comprises a first dimension orthogonal to the core and a second dimension orthogonal to the first dimension and to the core, wherein an aspect ratio of the first dimension to the second dimension is at least about 1.5:1. 44 . The article of any one of claims 34 - 43 , wherein at least one of the discontinuous shell regions consists of a single crystal. 45 . The article of any one of claims 34 - 44 , wherein the plurality of discontinuous semiconductor shell regions comprises Si.

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What does patent US2017073841A1 cover?
The present invention generally relates to nanoscale wires, and to methods of producing nanoscale wires. In some aspects, the nanoscale wires are nanowires comprising a core which is continuous and a shell which may be continuous or discontinuous, and/or may have regions having different cross-sectional areas. In some embodiments, the shell regions are produced by passing the shell material (or…
Who is the assignee on this patent?
Harvard College
What technology area does this patent fall under?
Primary CPC classification C30B29/66. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Thu Mar 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).