Semiconductor storage device

US2017071075A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017071075-A1
Application numberUS-201615062359-A
CountryUS
Kind codeA1
Filing dateMar 7, 2016
Priority dateSep 4, 2015
Publication dateMar 9, 2017
Grant date

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor storage device includes a substrate having a wiring, a first semiconductor memory, a terminal portion, a holder surrounding the terminal portion, a case, and a first plate-shaped member. The first semiconductor memory is disposed on a first principal surface of the substrate and is connected to the wiring. The terminal portion is connected to the substrate at a first end portion of the substrate and has a terminal connected to the wiring. The case houses part of the holder, the substrate, and the first semiconductor memory. Between the first principal surface and a first wall portion of the case facing the first principal surface, the first plate-shaped member is disposed. The first plate-shaped member is connected to the holder and the first principal surface on a second end portion side of the substrate, and has thermal conductivity.

First claim

Opening claim text (preview).

1 . A semiconductor storage device comprising: a substrate that comprises a wiring; a first semiconductor memory that is disposed on a first principal surface of the substrate and is connected to the wiring; a terminal portion that is connected to the substrate at a first end portion of the substrate and comprises a terminal connected to the wiring; a holder that surrounds the terminal portion; a case that houses part of the holder, the substrate, and the first semiconductor memory; and a first plate-shaped member that is disposed between the first principal surface and a first wall portion of the case facing the first principal surface so as to be separated from the first semiconductor memory and the case, is connected to the holder at a first end, is connected to the first principal surface on a second end portion side of the substrate at a second end, and comprises thermal conductivity. 2 . The semiconductor storage device according to claim 1 , wherein the first plate-shaped member comprises electrical conductivity and is connected to a ground wiring of the wiring on the first principal surface on the second end portion side. 3 . The semiconductor storage device according to claim 1 , comprising a second plate-shaped member that is disposed between a second principal surface of the substrate on an opposite side of the first principal surface and a second wall portion of the case facing the second principal surface so as to be separated from the case, is connected to the holder at a first end, is connected to the second principal surface on the second end portion side at a second end, and comprises thermal conductivity. 4 . The semiconductor storage device according to claim 2 , comprising a second plate-shaped member that is disposed between a second principal surface of the substrate on an opposite side of the first principal surface and a second wall portion of the case facing the second principal surface so as to be separated from the case, is connected to the holder at a first end, is connected to the second principal surface on the second end portion side at a second end, and comprises thermal conductivity. 5 . The semiconductor storage device according to claim 3 , comprising a second semiconductor memory that is disposed on the second principal surface and is connected to the wiring; wherein the second plate-shaped member is disposed so as to be separated from the second semiconductor memory. 6 . The semiconductor storage device according to claim 4 , comprising a second semiconductor memory that is disposed on the second principal surface and is connected to the wiring; wherein the second plate-shaped member is disposed so as to be separated from the second semiconductor memory. 7 . The semiconductor storage device according to claim 3 , wherein the second plate-shaped member comprises electrical conductivity and is connected to a ground wiring of the wiring on the second principal surface on the second end portion side. 8 . The semiconductor storage device according to claim 4 , wherein the second plate-shaped member comprises electrical conductivity and is connected to a ground wiring of the wiring on the second principal surface on the second end portion side. 9 . The semiconductor storage device according to claim 5 , wherein the second plate-shaped member comprises electrical conductivity and is connected to a ground wiring of the wiring on the second principal surface on the second end portion side. 10 . The semiconductor storage device according to claim 6 , wherein the second plate-shaped member comprises electrical conductivity and is connected to a ground wiring of the wiring on the second principal surface on the second end portion side. 11 . The semiconductor storage device according to claim 2 , wherein the first plate-shaped member contains metal. 12 . The semiconductor storage device according to claim 7 , wherein the second plate-shaped member contains metal. 13 . The semiconductor storage device according to claim 1 , comprising a first member that is connected to the first semiconductor memory and the first plate-shaped member between the first semiconductor memory and the first plate-shaped member and comprises thermal conductivity and an insulating property. 14 . The semiconductor storage device according to claim 5 , comprising a second member that is connected to the second semiconductor memory and the second plate-shaped member between the second semiconductor memory and the second plate-shaped member and comprises thermal conductivity and an insulating property. 15 . The semiconductor storage device according to claim 1 , comprising a controller that is disposed on the first principal surface so as to be separated from the first plate-shaped member and is connected to the wiring; and a third member that is connected to the controller and the first plate-shaped member between the controller and the first plate-shaped member and comprises thermal conductivity and an insulating property. 16 . The semiconductor storage device according to claim 13 , wherein the first member comprises resin or ceramic. 17 . The semiconductor storage device according to claim 14 , wherein the second member comprises resin or ceramic. 18 . The semiconductor storage device according to claim 15 , wherein the third member comprises resin or ceramic.

Assignees

Inventors

Classifications

  • characterised by their shape, e.g. having conical or cylindrical projections · CPC title

  • H05K5/0278Primary

    of USB type (details relating to connectors H01R27/00) · CPC title

  • the coupling element being an additional piece, e.g. thermal standoff · CPC title

  • H05K7/2039Primary

    characterised by the heat transfer by conduction from the heat generating element to a dissipating body (arrangements for increasing/decreasing heat-transfer, e.g. fins details, F28F13/00) · CPC title

  • the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks (housings for electrical equipment in general, see H05K5/02) · CPC title

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What does patent US2017071075A1 cover?
A semiconductor storage device includes a substrate having a wiring, a first semiconductor memory, a terminal portion, a holder surrounding the terminal portion, a case, and a first plate-shaped member. The first semiconductor memory is disposed on a first principal surface of the substrate and is connected to the wiring. The terminal portion is connected to the substrate at a first end portion…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H05K5/0278. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 09 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).