Ternary metal nitride formation by annealing constituent layers
US-2015184283-A1 · Jul 2, 2015 · US
US2017040380A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017040380-A1 |
| Application number | US-201615227053-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 3, 2016 |
| Priority date | Aug 6, 2015 |
| Publication date | Feb 9, 2017 |
| Grant date | — |
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According to one embodiment, a memory device includes a first electrode, a second electrode, a first layer, and a second layer. The first electrode includes a first element. The first layer is provided between the first electrode and the second electrode. The first layer includes at least one of an insulator or a first semiconductor. The second layer is provided between the first layer and the second electrode. The second layer includes a first region and a second region. The second region is provided between the first region and the second electrode. The second region includes a second element. A standard electrode potential of the second element is lower than a standard electrode potential of the first element. A concentration of nitrogen in the first region is higher than a concentration of nitrogen in the second region.
Opening claim text (preview).
What is claimed is: 1 . A memory device, comprising: a first electrode including a first element; a second electrode; a first layer provided between the first electrode and the second electrode, the first layer including at least one of an insulator or a first semiconductor; and a second layer provided between the first layer and the second electrode, the second layer including a first region and a second region, the second region being provided between the first region and the second electrode, the first region including nitrogen, the second region including a second element, a standard electrode potential of the second element being lower than a standard electrode potential of the first element, a concentration of nitrogen in the first region being higher than a concentration of nitrogen in the second region, or the second region not including nitrogen. 2 . The device according to claim 1 , wherein the second electrode includes a second semiconductor. 3 . The device according to claim 2 , wherein the second semiconductor includes at least one of amorphous silicon or polysilicon. 4 . The device according to claim 1 , wherein the first element includes at least one selected from the group consisting of silver, copper, nickel, cobalt, aluminum, titanium, and tantalum. 5 . The device according to claim 1 , wherein the insulator includes at least one of silicon oxide, silicon nitride, or a metal oxide. 6 . The device according to claim 1 , wherein the first region includes at least one selected from the group consisting of titanium nitride, tantalum nitride, tungsten nitride, and tantalum silicon nitride. 7 . The device according to claim 1 , wherein the second element includes at least one selected from the group consisting of titanium, zirconium, aluminum, tantalum, and iron. 8 . The device according to claim 1 , wherein the first semiconductor includes at least one selected from the group consisting of silicon and germanium. 9 . The device according to claim 1 , wherein the first element includes at least one selected from the group consisting of silver, copper, nickel, and cobalt, and the second element includes at least one selected from the group consisting of titanium, zirconium, aluminum, tantalum, and iron. 10 . The device according to claim 9 , wherein the first element includes silver. 11 . The device according to claim 9 , wherein the second element includes titanium. 12 . The device according to claim 9 , wherein the second electrode includes at least one of amorphous silicon or polysilicon. 13 . The device according to claim 9 , wherein the second region includes at least one selected from the group consisting of titanium nitride, tantalum nitride, tungsten nitride, and tantalum silicon nitride. 14 . The device according to claim 9 , wherein the first layer includes a compound including silicon and oxygen. 15 . The device according to claim 1 , wherein an electrical resistance between the first electrode and the second electrode is a first value when a voltage positive with respect to the second electrode is applied to the first electrode, and the electrical resistance is a second value when a voltage negative with respect to the second electrode is applied to the first electrode, the second value is higher than the first value. 16 . The device according to claim 1 , further comprising: a first interconnect extending in a first direction, the first interconnect being electrically connected to the first electrode, the first direction intersecting a direction from the second layer toward the first layer; and a second interconnect extending in a second direction, the second interconnect being electrically connected to the second electrode, the second direction intersecting the first direction and intersecting the direction from the second layer toward the first layer. 17 . A memory device, comprising: a first electrode including silver; a second electrode including at least one of amorphous silicon or polysilicon; a first layer provided between the first electrode and the second electrode, the first layer including a compound including silicon and oxygen; and a second layer provided between the first layer and the second electrode, the second layer including a first region and a second region, the second region being provided between the first region and the second electrode, the first region including nitrogen, the second region including titanium, a concentration of nitrogen in the first region being higher than a concentration of nitrogen in the second region, or the second region not including nitrogen. 18 . A memory device, comprising: a plurality of first interconnects extending in a first direction and separated from each other in a direction crossing the first direction; a plurality of second interconnects extending in a second direction crossing the first direction and separated from each other in a direction crossing the second direction, the second interconnects being separated from the first interconnects in a third direction crossing the first direction and the second direction; a control circuit connected with the first interconnects and the second interconnects; and a plurality of memory portions provided between the first interconnects and the second interconnects, each of the memory portions including a first electrode provided between one of the first interconnects and one of the second interconnects, a second electrode provided between the first electrode and the one of the second interconnects, a first layer provided between the first electrode and the second electrode, the first layer including at least one of an insulator or a first semiconductor, and a second layer provided between the first layer and the second electrode, the second layer including a first region and a second region, the second region being provided between the first region and the second electrode, the first region including nitrogen, the second region including a second element, a standard electrode potential of the second element being lower than a standard electrode potential of the first element, a concentration of nitrogen in the first region being higher than a concentration of nitrogen in the second region, or the second region not including nitrogen.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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