Semiconductor device and a method of increasing a resistance value of an electric fuse

Patent metadata

Field	Value
Publication number	US-2017040261-A1
Application number	US-201615298484-A
Country	US
Kind code	A1
Filing date	Oct 20, 2016
Priority date	Mar 7, 2006
Publication date	Feb 9, 2017
Grant date	—

Abstract

A semiconductor device having an electric fuse structure which receives an electric current to permit the electric fuse to be cut without damaging portions around the fuse. The electric fuse can be electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers.

First claim

We claim:

1 . A semiconductor device, comprising:
a first insulating layer formed over a semiconductor substrate; a first trench formed in the first insulating layer; an electric fuse formed in the first trench and cut by applying a current to the electric fuse; a second insulating layer formed over the electric fuse and the first insulating layer; a second trench formed in the second insulating layer; and a wiring formed in the second trench, wherein the first insulating layer includes Si, O and C and has 3 or less dielectric relative constant, wherein a thickness of the electric fuse is smaller than a thickness of the wiring, wherein a third insulating layer is formed between the electric fuse and the second insulating layer, has a smaller thickness than the first insulating layer and is formed of a different material form the first insulating layer, wherein the electric fuse includes a copper film, and wherein a barrier film having higher melting point than the copper film is formed between the copper film and side and bottom surfaces of the first trench, thereby the copper film of the electric fuse is surrounded by the barrier film and the third insulating film.

2 . A semiconductor device according to the claim 1 ,
wherein the barrier film includes Ta.

3 . A semiconductor device according to the claim 2 ,
wherein the barrier film includes first and second barrier films at the side surface of the first trench, wherein the first barrier film includes Ta, and wherein the second barrier film includes TaN.

4 . A semiconductor device according to the claim 3 ,
wherein the third insulating film includes a first film and a second film, wherein the first film includes Si and O, and wherein the second film includes Si, C and N.

5 . A semiconductor device according to the claim 1 ,
wherein the third insulating film includes a first film and a second film, wherein the first film includes Si and O, and wherein the second film includes Si, C and N.

Assignees

• Renesas Electronics Corp

Inventors

• Iwamoto Takeshi
• Kono Kazushi
• Arakawa Masashi
• Yonezu Toshiaki
• Obayashi Shigeki

Classifications

• H10W42/80 Primary

  protecting against overcurrent or overload, e.g. fuses or shunts (integrated devices comprising arrangements for electrical protection H10D89/60) · CPC title

• H10W20/497

  Inductive arrangements or effects of, or between, wiring layers · CPC title

• H10W20/49

  Adaptable interconnections, e.g. fuses or antifuses · CPC title

• H10W20/4421

  the principal metal being copper · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title