Multilayer circuit board, semiconductor apparatus, and method of manufacturing multilayer circuit board

Patent metadata

Field	Value
Publication number	US-2017006699-A1
Application number	US-201615264819-A
Country	US
Kind code	A1
Filing date	Sep 14, 2016
Priority date	Mar 20, 2014
Publication date	Jan 5, 2017
Grant date	—

Abstract

A multilayer circuit board with a laminated structure includes an outermost insulating layer provided as an uppermost or bottom layer of the multilayer circuit board and formed of a composite material containing a glass fiber; and a multilayer interconnect lamination provided as an adjacent layer next to the outermost insulating layer, the multilayer interconnect lamination having an interconnect provided in an insulating resin layer that does not contain a glass fiber, and an interlayer via electrically connected to the interconnect.

First claim

What is claimed is:

1 . A multilayer circuit board with a laminated structure, comprising:
an outermost insulating layer provided as an uppermost or bottom layer of the multilayer circuit board and formed of a composite material containing a glass fiber; and a multilayer interconnect lamination provided as an adjacent layer next to the outermost insulating layer, the multilayer interconnect lamination having an interconnect provided in an insulating resin layer that does not contain a glass fiber, and a interlayer via electrically connected to the interconnect.

2 . The multilayer circuit board as claimed in claim 1 , further comprising:
a first surface electrode provided on a surface of the outermost insulating layer; and a via plug provided in the outermost insulating layer, wherein the first surface electrode is electrically connected to the interconnect by the via plug and the interlayer via.

3 . The multilayer circuit board as claimed in claim 1 ,
wherein the interconnect provided in the insulating resin layer is a differential pair.

4 . The multilayer circuit board as claimed in claim 1 , wherein the insulating resin layer has a coefficient of thermal expansion similar or close to that of the interconnect.

5 . The multilayer circuit board as claimed in claim 1 , wherein the insulating resin layer is a polyimide layer and the interconnect is a copper interconnect.

6 . The multilayer circuit board as claimed in claim 1 , further comprising:
a through via that passes through the multilayer circuit board in a laminated direction; and a second surface electrode provided on a surface of the outermost insulating layer and electrically connected to the through via.

7 . A semiconductor apparatus comprising:
a multilayer circuit board having an outermost insulating layer provided as an uppermost or bottom layer of the multilayer circuit board and formed of a composite material containing a glass fiber, and a multilayer interconnect lamination provided as an adjacent layer next to the outermost insulating layer, the multilayer interconnect lamination having an interconnect provided in an insulating resin layer that does not contain a glass fiber and an interlayer via electrically connected to the interconnect; and a semiconductor device mounted on a surface electrode provided on the outer most insulating layer of the multilayer circuit board.

8 . The semiconductor apparatus as claimed in claim 7 ,
wherein the multilayer circuit board further has a via plug provided in the outermost insulating layer and connected to the surface electrode, and wherein the semiconductor device is electrically connected to the interconnect by the surface electrode, the via plug and the interlayer via.

9 . The semiconductor device as claimed in claim 7 , further comprising:
a passive component provided onto a second surface of the multilayer circuit board on an opposite side of a semiconductor device mounting surface, wherein the multilayer circuit board further has a second insulating resin layer positioned at or in vicinity of the second surface, the second insulating resin layer not containing a glass fiber, a high-speed signal line provided in the second insulating resin layer, and a through via that passes through the multilayer circuit board in a laminated direction, and wherein the through via and the high-speed signal line are coupled by the passive component.

10 . A method of manufacturing a multilayer circuit board, comprising:
fabricating a multilayer interconnect lamination by vacuum pressing at a first pressure, the multilayer interconnect lamination having a first interconnect built in an insulating resin layer without containing a glass fiber and a second interconnect formed on at least one surface of the insulating result layer; and combining the multilayer interconnect lamination and an insulating layer made of a composite material containing a glass fiber by a lamination process at a second pressure lower than the first pressure.

11 . The method as claimed in claim 10 , wherein the first pressure is equal to or greater than twice the second pressure, and equal to or less that two point three times the second pressure.

12 . The method as claimed in claim 10 , further comprising:
forming a interlayer via connecting the first interconnect and the second interconnect in the multilayer interconnect lamination before the lamination process.

13 . The method as claimed in claim 10 , further comprising:
forming a via plug in the insulating layer of the composite material by laser processing after the lamination process, the via plug being electrically connected to the first interconnect.

14 . The method as claimed in claim 10 , further comprising:
forming a interlayer via connecting the first interconnect and the second interconnect in the multilayer interconnect lamination before the lamination process; and forming a via plug reaching the second interconnect in the insulating layer of the composite material, and a surface electrode connected to the via plug, thereby electrically connecting the surface electrode to the first electrode by the interlayer via.

15 . The method as claimed in claim 10 , further comprising:
forming a through via that passes through the multilayer circuit board by laser processing after the lamination process.

16 . The method as claimed in claim 10 , wherein the multilayer interconnect lamination is fabricated using an insulating resin material and an interconnect material having a similar coefficient of thermal expansion.

17 . The method as claimed in claim 10 , wherein in the multilayer interconnect lamination, the insulating resin layer is formed of polyimide and the first interconnect and the second interconnect are formed of copper.

Assignees

• Fujitsu Ltd

Inventors

• Mizutani Daisuke
• Yamada Tetsuro
• Nakamura Naoki
• Abe Kenichiro
• Motooka Naohito

Classifications

• H05K1/0237 Primary

  High frequency adaptations (H05K1/0216 takes precedence) · CPC title

• H05K1/0298

  Multilayer circuits · CPC title

• H05K3/4614

  the electrical connections between the circuit boards being made during lamination · CPC title

• H05K1/113

  Via provided in pad; Pad over filled via · CPC title

• H05K1/181

  associated with surface mounted components · CPC title