Mounting substrate

US2016381802A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016381802-A1
Application numberUS-201615185099-A
CountryUS
Kind codeA1
Filing dateJun 17, 2016
Priority dateJun 26, 2015
Publication dateDec 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor connected to an output electrode and an input electrode of a mounting substrate includes a laminated body. In the laminating direction of the laminated body, the shortest distance from an outer first internal electrode to the surface of an external electrode on the side closer to a first principal surface, and the shortest distance from an outer second internal electrode to the surface of an external electrode on the side closer to a second principal surface are each about 40 μm or less. In the width direction of the laminated body, the shortest distance from an end of an internal electrode to the surface of the external electrode on the side closer to a first side surface, and the shortest distance from an end of an internal electrode to the surface of the external electrode on the side closer to a second side surface are each about 40 μm or less.

First claim

Opening claim text (preview).

What is claimed is: 1 . A mounting substrate comprising: an output electrode that outputs signals including a frequency region of 10 GHz or higher; an input electrode that inputs signals including a frequency region of 10 GHz or higher; and a multilayer ceramic capacitor connected to the output electrode and the input electrode; wherein the multilayer ceramic capacitor includes: a laminated body including a plurality of dielectric layers and a plurality of internal electrodes, a first principal surface and a second principal surface opposed in a laminating direction, a first side surface and a second side surface opposed in a width direction perpendicular or substantially perpendicular to the laminating direction, and a first end surface and a second end surface opposed in a length direction perpendicular or substantially perpendicular to the laminating direction and the width direction; a first external electrode that covers the first end surface, and extends from the first end surface and covers the first principal surface, the second principal surface, the first side surface, and the second side surface; and a second external electrode that covers the second end surface, and extends from the second end surface and covers the first principal surface, the second principal surface, the first side surface, and the second side surface; wherein the plurality of internal electrodes includes a first internal electrode connected to the first external electrode and a second internal electrode connected to the second external electrode; as viewed in cross sections including the first external electrode on the first principal surface, the second principal surface, the first side surface, and the second side surface, and cross sections including the second external electrode on the first principal surface, the second principal surface, the first side surface, and the second side surface: a longest dimension is about 40 μm or less among dimensions in the laminating direction from the internal electrode located closest to the first principal surface in the laminating direction, among the first internal electrode and the second internal electrode, to a surface of the external electrode disposed on a side closer to the first principal surface, and from the internal electrode located closest to the second principal surface in the laminating direction, among the first internal electrode and the second internal electrode, to a surface of the external electrode disposed on a side closer to the second principal surface; and a longest dimension is about 40 μm or less among dimensions in a width direction from a surface of the first internal electrode or the second internal electrode located closest to the first side surface in the width direction, among the first internal electrode and the second internal electrode, to a surface of the external electrode disposed on a side closer to the first side surface, and from the surface of the first internal electrode or the second internal electrode located closest to the second side surface in the width direction, among the first internal electrode and the second internal electrode, to a surface of the external electrode disposed on a side closer to the second side surface. 2 . The mounting substrate according to claim 1 , wherein a difference is about 10 μm or less between the longest dimension among dimensions in the laminating direction from the internal electrode located closest to the first principal surface in the laminating direction, among the first internal electrode and the second internal electrode, to the surface of the external electrode disposed on the side closer to the first principal surface, and from the internal electrode located closest to the second principal surface in the laminating direction, among the first internal electrode and the second internal electrode, to the surface of the external electrode disposed on the side closer to the second principal surface; and the longest dimension among dimensions in the width direction from the surface of the first internal electrode or the second internal electrode located closest to the first side surface in the width direction, among the first internal electrode and the second internal electrode, to a surface of the external electrode disposed on a side closer to the first side surface, and from the surface of the first internal electrode or the second internal electrode located closest to the second side surface in the width direction, among the first internal electrode and the second internal electrode, to the surface of the external electrode disposed on the side closer to the second side surface. 3 . The mounting substrate according to claim 1 , wherein the plurality of internal electrodes includes a plurality of first internal electrodes and a plurality of second internal electrodes; the plurality of first internal electrodes and the plurality of second internal electrodes have a dimension of about 0.3 μm or more and about 1.0 μm or less in the laminating direction, and a total number of the first internal electrodes and the second internal electrodes is 150 or more and 350 or less. 4 . The mounting substrate according to claim 1 , wherein the multilayer ceramic capacitor has a dimension of about 0.2 mm or more and about 0.7 mm or less in the length direction. 5 . The mounting substrate according to claim 1 , wherein the first external electrode and the second external electrode each includes a base electrode disposed on the laminated body, and a plated layer disposed on the base electrode, and the plated layer includes Au. 6 . The mounting substrate according to claim 1 , wherein the internal electrodes include Cu. 7 . The mounting substrate according to claim 1 , wherein the internal electrodes include Ni. 8 . The mounting substrate according to claim 1 , wherein the laminated body has a parallelepiped shape. 9 . A mounting substrate comprising: an output electrode that outputs signals including a frequency region of 10 GHz or higher; an input electrode that inputs signals including a frequency region of 10 GHz or higher; and a first multilayer ceramic capacitor and a second multilayer ceramic capacitor each connected to the output electrode and the input electrode; wherein each of the first multilayer ceramic capacitor and the second multilayer capacitor includes: a laminated body including a plurality of dielectric layers laminated and a plurality of internal electrodes, a first principal surface and a second principal surface opposed in a laminating direction, a first side surface and a second side surface opposed in a width direction perpendicular or substantially perpendicular to the laminating direction, and a first end surface and a second end surface opposed in a length direction perpendicular or substantially perpendicular to the laminating direction and the width direction; a first external electrode that covers the first end surface, and extend from the first end surface and covers the first principal surface, the second principal surface, the first side surface, and the second side surface; and a second external electrode that covers the second end surface, and extend from the second end surface and covers the first principal surface, the second principal surface, the first side surface, and the second side surface; wherein the plurality of internal electrodes includes a first internal electrode connected to the first external electrode and a second internal electrode connected to the second external electrode; as viewed in cross sections including the first external electrode on the first principal surface, the second principal surface, the first side surface, and the second side surface, and cr

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • H01G4/248Primary

    the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

  • H05K1/181Primary

    associated with surface mounted components · CPC title

  • Non-printed capacitor · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

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What does patent US2016381802A1 cover?
A multilayer ceramic capacitor connected to an output electrode and an input electrode of a mounting substrate includes a laminated body. In the laminating direction of the laminated body, the shortest distance from an outer first internal electrode to the surface of an external electrode on the side closer to a first principal surface, and the shortest distance from an outer second internal el…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).