System operation queue for transaction

Patent metadata

Field	Value
Publication number	US-2016378663-A1
Application number	US-201514845343-A
Country	US
Kind code	A1
Filing date	Sep 4, 2015
Priority date	Jun 26, 2015
Publication date	Dec 29, 2016
Grant date	—

Abstract

Embodiments relate to a system operation queue for a transaction. An aspect includes determining whether a system operation is part of an in-progress transaction of a central processing unit (CPU). Another aspect includes based on determining that the system operation is part of the in-progress transaction, storing the system operation in a system operation queue corresponding to the in-progress transaction. Yet another aspect includes, based on the in-progress transaction ending, processing the system operation in the system operation queue.

First claim

What is claimed is:

1 . A computer implemented method for a system operation queue for a transaction, the method comprising:
determining whether a system operation is part of an in-progress transaction of a central processing unit (CPU); based on determining that the system operation is part of the in-progress transaction, storing the system operation in a system operation queue corresponding to the in-progress transaction; and based on the in-progress transaction ending, processing the system operation in the system operation queue.

2 . The method of claim 1 , wherein the system operation queue stores a plurality of system operations corresponding to the in-progress transaction, and further comprising processing each of the plurality of system operations in the system operation queue based on the in-progress transaction ending.

3 . The method of claim 1 , wherein processing the system operation comprises sending a broadcast notification regarding the system operation from the CPU to another CPU.

4 . The method of claim 3 , wherein the system operation comprises an instruction to flush an entry in a translation lookaside buffer (TLB), and wherein the broadcast notification comprises a TLB invalidate instruction.

5 . The method of claim 1 , wherein the system operation queue is stored in a transaction system operation queue logic that is in communication with an issue queue of the CPU, and wherein the determination of whether the system operation is part of an in-progress transaction is made based on the system operation being encountered in the issue queue.

6 . The method of claim 5 , wherein the transaction system operation queue logic stores a plurality of system operation queues, each of the plurality of system operation queues corresponding to a respective in-progress transaction.

7 . The method of claim 6 , wherein a number of the plurality of system operation queues is equal to a number of threads supported by the CPU.

8 . The method of claim 1 , wherein the system operation comprises an update to a control register.

9 . The method of claim 1 , further comprising, based on aborting of the in-progress transaction, flushing the system operation queue.

Assignees

• IBM

Inventors

• Bradbury Jonathan D
• Gschwind Michael K
• Schwarz Eric M

Classifications

• G06F9/466

  Transaction processing · CPC title

• G06F12/0811

  with multilevel cache hierarchies · CPC title

• G06F9/3004

  to perform operations on memory · CPC title

• G06F2212/314

  In storage network, e.g. network attached cache · CPC title

• G06F12/0833 Primary

  in combination with broadcast means (e.g. for invalidation or updating) · CPC title