Opportunistic power management for managing intermittent power available to data processing device having semi-non-volatile memory or non-volatile memory

Patent metadata

Field	Value
Publication number	US-2016378169-A1
Application number	US-201514752789-A
Country	US
Kind code	A1
Filing date	Jun 26, 2015
Priority date	Jun 26, 2015
Publication date	Dec 29, 2016
Grant date	—

Abstract

A data processing device is configured to deploy, in response to an intermittent source of power, opportunistic power management strategies to manage harvested energy based on an expected amount of energy available to the data processing device and on expected energy expenditures defined by data processing and memory content control writing performed by the data processing device.

First claim

1 . A data processing device configured to deploy opportunistic power management strategies to manage energy, obtained from an intermittent source of power, based on an expected amount of energy available to the data processing device and on expected energy expenditures defined by data processing and memory content control operations performed by the data processing device, the data processing device comprising:
an energy harvester configured to obtain the energy from the intermittent source of power; an energy estimator configured to determine the expected amount of energy available to the data processing device; a processor configured to perform a data processing operation having a first expected energy expenditure; a memory storage device configured to maintain data written to the memory storage device in connection with a memory writing operation, the maintaining and memory writing operation having a second expected energy expenditure; and a controller configured to:
compare the expected amount of energy available and the first and second expected energy expenditures, and
select, based on the comparing, a power management strategy from among the opportunistic power management strategies including continuing a partly completed data processing operation, writing to the memory storage device a checkpoint representing data associated with the partly completed data processing operation for potentially resuming the partly completed data processing operation after additional energy is obtained, and transitioning to a reduced-power consumption state while awaiting the additional energy to be obtained.

2 . The data processing device of claim 1 , in which the controller is further configured to estimate the first and second expected energy expenditures based on, respectively, previous data processing and memory content control operations performed by the data processing device.

3 . The data processing device of claim 1 , further comprising an energy storage device, and in which the expected amount of energy available to the data processing device includes energy stored in the energy storage device.

4 . The data processing device of claim 1 , further comprising:
a data input device operatively associated with the processor; a communications module operatively associated with the processor for transmitting processed results; and in which the data processing operation is selected from the group consisting of reading data from the data input device, providing to the communications module a processed output, and performing computation on the data from the data input device.

5 . The data processing device of claim 1 , in which the energy estimator is further configured to determine the expected amount of energy available to the data processing device by anticipating a lower bound of energy available from the energy harvester during a harvesting episode.

6 . The data processing device of claim 1 , in which the energy estimator is further configured to determine the first expected energy expenditure by determining an upper bound of energy consumed by a previous data processing operation.

7 . The data processing device of claim 1 , in which the memory storage device is a non-volatile memory or semi-non-volatile memory.

8 . The data processing device of claim 1 , in which the memory storage device is a spin-transfer torque random access memory (STT-RAM).

9 . The data processing device of claim 1 , in which the processor is further configured to execute a pre-compiled software application for controlling the data processing operation, and in which the controller is further configured to perform the opportunistic power management strategies independently of the controlling of the data processing operation such that the pre-compiled software application is free from compiled instructions for managing power.

10 . The data processing device of claim 1 , further comprising a cache memory for storing cache data, and in which the opportunistic power management strategies further include determining whether to checkpoint the cache data based on the expected amount of energy available and an amount of energy to checkpoint the cache data.

11 . A method performed by a data processing device for deploying opportunistic power management strategies to manage energy, obtained from an intermittent source of power, based on an expected value of energy available to the data processing device and on energy costs associated with data processing work and memory content control operations performed by the data processing device, the method comprising:
obtaining energy from the intermittent source of power; determining the expected value of energy available to the data processing device; determining a work energy cost associated with working on a sequence of data processing work including collection of input data, computation of processed data associated with the input data, and communication of the processed data to another device through a network connection; determining a checkpoint energy cost associated with writing the processed data to a memory storage device during a memory writing operation; comparing the expected value of energy available and the work and checkpoint energy costs; and selecting, based on the comparing, a power management strategy from among the opportunistic power management strategies including:
continuing the sequence of data processing work,
checkpointing in the memory storage device an incremental result of the processed data, and
transitioning to a reduced-power consumption state while awaiting for additional energy to be obtained.

12 . The method of claim 11 , further comprising, in response to the expected value of energy available being greater than the checkpoint energy cost and less than a sum of the work and checkpoint energy costs, checkpointing and continuing working until the energy available is depleted or replenished.

13 . The method of claim 11 , further comprising, in response to the expected value of energy available being greater than work energy cost but less than the checkpoint energy cost, completing the working without checkpointing.

14 . The method of claim 11 , further comprising, in response to the expected value of energy available surpassing a sum of the work and checkpoint energy costs, and having multiple steps in the sequence of data processing work available, performing the multiple steps before checkpointing so as to reduce energy expended on checkpointing.

15 . The method of claim 11 , further comprising checkpointing the incremental result in response to the incremental result comprising fundamental work so as to avoid data loss.

16 . The method of claim 11 , further comprising maintaining a reserve of energy for checkpointing fundamental work and suppressing checkpointing until the expected value of energy available approaches an amount of energy maintained as the reserve of energy.

17 . The method of claim 11 , in which the data processing device comprises a first memory having a first amount of volatility and a first energy cost to write, and a second memory having a second amount of volatility and a second energy cost to write, in which the first memory has a lower energy cost and a greater amount of volatility than those of the second memory, the method further comprising:
in response to work being designated as non-recoverable, checkpointing the work to the second memory; and in response to work being designated as recoverable, checkpointing the work to the first memory.

18 . The method of c

Assignees

• Intel Corp

Inventors

• Naeimi Helia
• Keppel David

Classifications

• G06F1/3275 Primary

  Power saving in memory, e.g. RAM, cache · CPC title

• G06F1/3212

  Monitoring battery levels, e.g. power saving mode being initiated when battery voltage goes below a certain level · CPC title

• G06F1/30

  Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title

• G06F1/263 Primary

  Arrangements for using multiple switchable power supplies, e.g. battery and AC (G06F1/30 takes precedence) · CPC title

• G06F1/3246

  by software initiated power-off · CPC title