Darc signal demodulation circuit arrangement and method for operating same

Patent metadata

Field	Value
Publication number	US-2016373280-A1
Application number	US-201515123057-A
Country	US
Kind code	A1
Filing date	Feb 2, 2015
Priority date	Mar 6, 2014
Publication date	Dec 22, 2016
Grant date	—

Abstract

A DARC signal demodulation circuit assemblage for recovering a DARC signal (DARC data) from an FM multiplex transmission signal includes: a pilot tone regulation circuit to obtain first and second mutually orthogonal oscillation synchronous with a stereo pilot tone encompassed by the FM multiplex transmission signal; a frequency quadruplication section for obtaining third and fourth mutually orthogonal oscillation having a frequency quadrupled as to the stereo pilot tone; a first multiplication section for obtaining a first multiplication signal from the FM multiplex transmission signal and from the third oscillation; a second multiplication section for obtaining a second multiplication signal from the FM multiplex transmission signal and from the fourth oscillation; first/second low-pass filters for obtaining first/second DARC signal components by low-pass filtration of the first and second multiplication signals; and an FM demodulation section for obtaining the DARC signal from a frequency demodulation of the first/second DARC signal components.

First claim

1 - 10 . (canceled)

11 . A DARC signal demodulation circuit assemblage for recovering a DARC signal, containing DARC data, from an FM multiplex transmission signal, comprising:
a pilot tone regulation circuit to obtain a first mutually orthogonal oscillation and a second mutually orthogonal oscillation synchronous with a stereo pilot tone encompassed by the FM multiplex transmission signal; a frequency quadruplication section for obtaining a third mutually orthogonal oscillation and a fourth mutually orthogonal oscillation having a frequency quadrupled with respect to the stereo pilot tone; a first multiplication section for obtaining a first multiplication signal from the FM multiplex transmission signal and from the third oscillation; a second multiplication section for obtaining a second multiplication signal from the FM multiplex transmission signal and from the fourth oscillation; a first low-pass filter for obtaining a first DARC signal component by low-pass filtration of the first multiplication signal; a second low-pass filter for obtaining a second DARC signal component by low-pass filtration of the second multiplication signal; and an FM demodulation section for obtaining the DARC signal from a frequency demodulation of the first DARC signal component and the second DARC signal component.

12 . The DARC signal demodulation circuit assemblage of claim 11 , wherein the pilot tone regulation circuit is configured with a phase-locked loop to be latched onto the stereo pilot tone.

13 . The DARC signal demodulation circuit assemblage of claim 11 , wherein there is a clock signal derivation section, coupled to the pilot tone regulation circuit, for deriving, in a frequency- and phase-accurate manner with respect to the stereo pilot tone, a clock signal for obtaining the DARC data from the DARC signal.

14 . The DARC signal demodulation circuit assemblage of claim 13 , wherein there is a propagation time element, downstream from the clock signal derivation section, for delaying the clock signal by an amount equal to a predefinable signal propagation time.

15 . The DARC signal demodulation circuit assemblage of claim 11 , wherein the pilot tone regulation circuit includes a control signal generation section having:
a third multiplication section for obtaining a third multiplication signal from the FM multiplex transmission signal and from the first oscillation; a fourth multiplication section for obtaining a fourth multiplication signal from the FM multiplex transmission signal and from the second oscillation; a fifth multiplication section for obtaining a fifth multiplication signal from the third and the fourth multiplication signal; and threshold value circuit for constituting a control signal from the fifth multiplication signal; wherein the pilot tone regulation circuit includes an oscillation generator for constituting the first and the second oscillation, in a manner controlled by the control signal, by polynomial approximation.

16 . A method for operating a DARC signal demodulation circuit assemblage, to recover a DARC signal, containing DARC data, from a FM multiplex transmission signal, the method comprising:
obtaining a first mutually orthogonal oscillation and a second mutually orthogonal oscillation synchronous with a stereo pilot tone encompassed by the FM multiplex transmission signal; obtaining a third mutually orthogonal oscillation and a fourth mutually orthogonal oscillation having quadruple the frequency of the stereo pilot tone from the first oscillation and the second oscillation by frequency quadruplication; obtaining a first multiplication signal from the FM multiplex transmission signal and from the third oscillation by signal multiplication; and obtaining a second multiplication signal from the FM multiplex transmission signal and from the fourth oscillation; obtaining, by low-pass filtration, a first DARC signal component from the first multiplication signal, and obtaining a second DARC signal component from the second multiplication signal; and obtaining the DARC signal from a frequency demodulation of the first signal component and the second DARC signal component.

17 . The method of claim 16 , wherein a clock signal for obtaining the DARC data from the DARC signal is derived from the stereo pilot tone in frequency- and phase-accurate fashion with respect to the stereo pilot tone.

18 . A computer readable medium having a computer program, which is executable by a processor, comprising:
a program code arrangement having program code for operating a DARC signal demodulation circuit assemblage, to recover a DARC signal, containing DARC data, from a FM multiplex transmission signal, by performing the following:
obtaining a first mutually orthogonal oscillation and a second mutually orthogonal oscillation synchronous with a stereo pilot tone encompassed by the FM multiplex transmission signal;
obtaining a third mutually orthogonal oscillation and a fourth mutually orthogonal oscillation having quadruple the frequency of the stereo pilot tone from the first oscillation and the second oscillation by frequency quadruplication;
obtaining a first multiplication signal from the FM multiplex transmission signal and from the third oscillation by signal multiplication; and
obtaining a second multiplication signal from the FM multiplex transmission signal and from the fourth oscillation;
obtaining, by low-pass filtration, a first DARC signal component from the first multiplication signal, and
obtaining a second DARC signal component from the second multiplication signal; and
obtaining the DARC signal from a frequency demodulation of the first signal component and the second DARC signal component.

19 . The computer readable medium of claim 18 , wherein a clock signal for obtaining the DARC data from the DARC signal is derived from the stereo pilot tone in frequency- and phase-accurate fashion with respect to the stereo pilot tone.

20 . The DARC signal demodulation circuit assemblage of claim 11 , wherein the DARC signal demodulation circuit assemblage is in an FM multiplex broadcast receiver.

Assignees

• Bosch Gmbh Robert

Inventors

• Nyenhuis Detlev

Classifications

• H04L27/227 Primary

  using coherent demodulation · CPC title

• H04H2201/13

  radio data system/radio broadcast data system [RDS/RBDS] · CPC title

• H04B1/16

  Circuits · CPC title

• H04B1/1646

  adapted for the reception of stereophonic signals · CPC title

• H04L27/2014

  in which the phase changes in a piecewise linear manner during each symbol period, e.g. minimum shift keying, fast frequency shift keying (H04L27/201 takes precedence) · CPC title