Relative timed clock gating cell
US-2016365857-A1 · Dec 15, 2016 · US
US2016366358A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016366358-A1 |
| Application number | US-201514924418-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 27, 2015 |
| Priority date | Jun 9, 2015 |
| Publication date | Dec 15, 2016 |
| Grant date | — |
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A read-out method of an image sensing device includes: firstly counting a reset signal of a pixel signal based on a first analog gain during a first period of a unit row period; storing a result of the first counting as a previous counting result; secondly counting the reset signal based on a second analog gain; thirdly counting a data signal of the pixel signal based on the second analog gain during a second period following the first period in the unit row period; storing a first counting signal corresponding to results of the second counting and the third counting; fourthly counting the data signal based on the first analog gain during a third period following the second period in the unit row period; and storing a second counting signal corresponding to the previous counting result and a result of the fourth counting.
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What is claimed is: 1 . A counting circuit comprising: a sampling unit suitable for sampling an inverted bit signal, which corresponds to any one of inverted signals of a bit signal and a previous bit signal, as the bit signal in response to a counting target clock signal; a first latch unit suitable for latching the bit signal, as which the sampling unit samples the inverted bit signal corresponding to the inverted signal of the bit signal during a first period, as the previo…
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