Circuit for clamping current in a charge pump

Patent metadata

Field	Value
Publication number	US-2016359408-A1
Application number	US-201615174050-A
Country	US
Kind code	A1
Filing date	Jun 6, 2016
Priority date	Nov 30, 2006
Publication date	Dec 8, 2016
Grant date	—

Abstract

A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.

First claim

1 . (canceled)

2 . A charge pump comprising:
a first capacitor; a pump up current path comprising a first transistor coupled between a first power supply and a first node, the gate of the first transistor coupled to a first output of a pump up phase detector, and a second transistor coupled between the first node and said first capacitor, the gate of the second transistor coupled to a first bias input; a pump down current path comprising a third transistor coupled between a second power supply and a second node; the gate of the third transistor coupled to a second output of a pump down phase detector, and a fourth transistor coupled between the second node and the first capacitor, the gate of the fourth transistor coupled to a second bias input; a first alternate current path coupled between a first intermediate node and said second power supply configured to conduct current for a first period of time when said first transistor is switched to the off state; and a second alternate current path coupled between a second intermediate node and said first power supply configured to conduct current for a second period of time when said third transistor is switched to the off state, wherein said first alternate current path further comprises a fifth transistor coupled to the first node and a third node, a sixth transistor coupled to the third node and the second power supply and, and a first inverter whose input is coupled to the first output of the pump up phase detector and whose output is coupled to a second capacitor, wherein said second alternate current path further comprises a seventh transistor coupled to the second node and a fourth node, an eighth transistor coupled to the fourth node and said first power supply, and a second inverter whose input is coupled to the second output of the pump down phase detector and whose output is coupled to a third capacitor, and wherein each of the second capacitor and the third capacitor acts to pump additional charge into the third and fourth nodes respectively during the switching off of the first and third transistors.

3 . The charge pump claimed in claim 2 , wherein the second and third capacitors are FET type.

4 . The charge pump claimed in claim 2 , wherein the second and third capacitors are standard type.

5 . The charge pump claimed in claim 2 , wherein the second capacitor is PFET type.

6 . The charge pump claimed in claim 2 , wherein the third capacitor is NFET type.

Assignees

• Conversant Intellectual Property Man Inc

Inventors

• Vlasenko Peter
• Mai Huy Tuong

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H03K5/086

  generated by feedback · CPC title

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title

• H03K5/13

  Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals · CPC title

• G05F3/02

  Regulating voltage or current · CPC title