Nanostructured silicon with useful thermoelectric properties

Patent metadata

Field	Value
Publication number	US-2016359096-A1
Application number	US-201615176087-A
Country	US
Kind code	A1
Filing date	Jun 7, 2016
Priority date	Mar 24, 2011
Publication date	Dec 8, 2016
Grant date	—

Abstract

The invention provides for a nanostructured silicon or holey silicon (HS) that has useful thermoelectric properties. The invention also provides for a device comprising the nanostructured silicon or HS. The HS can be placed between two electrodes and used for thermoelectric power generation or thermoelectric cooling.

First claim

1 . A method of making a nano structured ordered porous silicon, the method comprising:
forming an ordered polymeric nanostructure on a silicon-on-insulator substrate; depositing a nanoscale metal film on the ordered polymeric nanostructure on a silicon layer of the silicon-on-insulator substrate; removing the ordered polymeric nanostructure from the silicon layer of the silicon-on-insulator substrate to form a silicon etching metal mask; etching the silicon through the metal mask to form the nanostructured ordered porous silicon; removing the metal mask from the etched nanostructured ordered porous silicon; and releasing the nanostructured ordered porous silicon from the remaining silicon-on-insulator substrate.

2 . The method of claim 1 , wherein the nanostructured ordered porous silicon consists essentially of single crystal porous silicon having uniform nanoscale pore size and separation.

3 . The method of claim 1 , wherein the forming the ordered polymeric nanostructure on the silicon-on-insulator substrate comprises assembling polystyrene nanospheres into a closed-packed monolayer by dip-coating onto a silicon device layer of the silicon-on-insulator substrate.

4 . The method of claim 3 , further comprising applying an oxygen plasma to the nanospheres until they are separated from each other.

5 . The method of claim 4 , further comprising e-beam evaporating a thin layer of chromium onto the silicon device layer, followed by stripping off the nanospheres with sonication in an organic solvent to form the metal mask.

6 . The method of claim 5 , further comprising etching the silicon device layer through the metal mask to form the nanostructured ordered porous silicon.

7 . The method of claim 6 , wherein the etching is done by anisotropic DRIE.

8 . The method of claim 7 , further comprising removing the metal mask from the etched nanostructured ordered porous silicon, and releasing the nanostructured ordered porous silicon from the remaining silicon-on-insulator substrate.

9 . The method of claim 8 , wherein nanostructured ordered porous silicon is released from substrate by etching off the buried oxide layer in hydrofluoric acid (HF) vapor.

10 . The method of claim 9 , wherein the released nanostructured ordered porous silicon is formed into a ribbon by standard photolithography prior to the release.

11 . The method of claim 10 , wherein the ribbon of nanostructured ordered porous silicon is about 1 to 3 μm wide by 20 to 50 μm long, and about 100 nm thick.

12 . The method of claim 11 , wherein the ribbon of nanostructured ordered porous silicon has a hexagonal holey pattern having a pitch of equal to or more than about 140 nm.

13 . The method of claim 11 , wherein the ribbon of nanostructured ordered porous silicon has a hexagonal holey pattern having a pitch of equal to or more than about 350 nm.

14 . The method of claim 1 , wherein the forming the ordered polymeric nanostructure on the silicon-on-insulator substrate comprises spin coating polystyrene-block-poly(4-vinylpyridine) (S4VP) copolymer mixed with 40 wt % polystyrene homopolymer onto a silicon device layer of the silicon-on-insulator substrate.

15 . The method of claim 14 , further comprising annealing the spun-on coating in tetrahydrofuran (THF) vapor.

16 . The method of claim 15 , further comprising surface reconstructing a long-range ordered hexagonally packed holey structure.

17 . The method of claim 16 , wherein the ribbon of nanostructured ordered porous silicon has a hexagonal holey pattern having a pitch of equal to or more than about 55 nm.

18 . The method of claim 2 , wherein the essentially of single crystal porous silicon having uniform nanoscale pore size and separation has thermoelectric material properties of a phonon glass and an electron crystal.

19 . The method of claim 18 , The nanostructured ordered porous silicon of claim 1 , wherein the nanostructured ordered porous silicon has a ZT value equal to or more than about 0.4 at room temperature.

20 . The method of claim 19 , The nanostructured ordered porous silicon of claim 10 , wherein the nanostructured ordered porous silicon has a ZT value equal to or more than about 0.6 at room temperature.

Assignees

• Univ California
• Univ Massachusetts

Inventors

• Yang Peidong
• Tang Jinyao
• Wang Hung-Ta
• Russell Thomas P
• Lee Dong-Hyun

Classifications

• C01P2004/20

  extending in two dimensions, e.g. plate-like · CPC title

• H01L35/32

  Electricity · mapped topic

• C01P2006/40

  Electric properties · CPC title

• C01P2006/32

  Thermal properties · CPC title

• H01L35/34 Primary

  Electricity · mapped topic