Semiconductor device

Patent metadata

Field	Value
Publication number	US-2016358977-A1
Application number	US-201615174293-A
Country	US
Kind code	A1
Filing date	Jun 6, 2016
Priority date	Nov 11, 2004
Publication date	Dec 8, 2016
Grant date	—

Abstract

The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.

First claim

1 . A semiconductor device comprising:
a transistor provided over an insulating layer; a conductive layer which functions as a source wiring or a drain wiring of the transistor; a memory element which overlaps the transistor; and a conductive layer which functions as an antenna, wherein the memory element comprises a first conductive layer, an organic compound layer or a phase change layer and a second conductive layer laminated in this order; and wherein the conductive layer which functions as the antenna and the conductive layer which functions as the source wiring or the drain wiring of the transistor are provided on the same layer.

2 . A method of manufacturing a semiconductor device comprising:
forming an insulating layer over a substrate; forming an opening in the insulating layer; forming a transistor over the insulating layer; forming a conductive layer over the insulating layer, wherein a portion of the conductive layer is formed in the opening of the insulating layer; separating the substrate from the insulating layer; and attaching a flexible substrate to the insulating layer after separating the substrate so that the insulating layer is located between the flexible substrate and the transistor, wherein the conductive layer is electrically connected to the transistor.

3 . The method according to claim 2 , wherein the flexible substrate is plastic.

4 . The method according to claim 2 , wherein the flexible substrate is provided with an antenna.

5 . A method of manufacturing a semiconductor device comprising:
forming a first insulating layer over a substrate; forming a transistor over the first insulating layer; forming a second insulating layer over the transistor; forming an opening in the second insulating layer and the first insulating layer; forming a conductive layer over the second insulating layer, wherein a portion of the conductive layer is formed in the opening of the first insulating layer and the second insulating layer; separating the substrate from the first insulating layer; and attaching a flexible substrate to the first insulating layer after separating the substrate so that the first insulating layer is located between the flexible substrate and the transistor, wherein the conductive layer is electrically connected to the transistor.

6 . The method according to claim 5 , wherein the flexible substrate is plastic.

7 . The method according to claim 5 , wherein the flexible substrate is provided with an antenna.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Abe Hiroko
• Nemoto Yukie
• Nomura Ryoji
• Yukawa Mikio

Classifications

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W72/07554

  changes in dispositions · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/547

  Dispositions of multiple bond wires · CPC title

• H10W44/248

  for antennas · CPC title