Electrostatic discharge protection device

Patent metadata

Field	Value
Publication number	US-2016358904-A1
Application number	US-201514728053-A
Country	US
Kind code	A1
Filing date	Jun 2, 2015
Priority date	Jun 2, 2015
Publication date	Dec 8, 2016
Grant date	—

Abstract

An electrostatic discharge (ESD) protection device includes a first trigger element and a first silicon control rectifier (SCR) element. The first trigger element has a first parasitic bipolar junction transistor (BJT) formed in a substrate. The first SCR element has a second parasitic BJT formed in the substrate. The first parasitic BJT and the second parasitic BJT has a common parasitic bipolar base, and the first parasitic BJT has a trigger voltage substantially lower than that of the second parasitic BJT.

First claim

1 . An electrostatic discharge protection device, comprising:
a first trigger element, having a first parasitic bipolar junction transistor (BJT) formed in a substrate and electrically connected to an input/output pad; and a first silicon control rectifier (SCR) element, having a second parasitic BJT formed in the substrate; wherein the first parasitic BJT and the second parasitic BJT has a common parasitic bipolar base, and the first parasitic BJT has a trigger voltage substantially lower than that of the second parasitic BJT.

2 . The ESD protection device according to claim 1 , wherein the first trigger element comprises a first metal-oxide-semiconductor (MOS) transistor comprising:
a first gate structure, disposed on the substrate; a first doping well having a first conductivity, disposed in the substrate and adjacent to the first gate structure; a first doping area having the first conductivity, disposed in the first doping well and separated from the first gate structure for a first distance; and a second doping area having the first conductivity, disposed in the substrate, adjacent to the first gate structure and separated from the first doping well.

3 . The ESD protection device according to claim 2 , wherein the first parasitic BJT is formed between the first doping area, the second doping area and the substrate.

4 . The ESD protection device according to claim 1 , wherein the first SCR element comprises:
a second gate structure, disposed on the substrate; a second doping well, having the first conductivity, disposed in the substrate and adjacent to the second gate structure; a third doping area, having the first conductivity, disposed in the second doping well and separated from the second gate structure for a second distance; a fourth doping area, having a second conductivity, disposed in the second doping well, adjacent to one side of the third doping area depart from the second gate structure; a fifth doping area, having the first conductivity, disposed in the second doping well, adjacent to the fourth doping area and separated from the third doping area by the fourth doping area; and a sixth doping area, having the first conductivity, disposed in the substrate, adjacent to the second gate structure and separated from the second doping well.

5 . The ESD protection device according to claim 4 , wherein the second parasitic BJT is formed between the fifth doping area, the sixth doping area and the substrate.

6 . The ESD protection device according to claim 4 , wherein the first distance is shorter than the second distance.

7 . The ESD protection device according to claim 4 , wherein the first conductivity is n type and the second conductivity is p type.

8 . The ESD protection device according to claim 4 , wherein the first conductivity is p type and the second conductivity is n type.

9 . The ESD protection device according to claim 1 , further comprising a second SCR element, having a third parasitic BJT formed in the substrate; wherein the first parasitic BJT and the third parasitic BJT has a common parasitic bipolar base, and the first parasitic BJT has a trigger voltage substantially lower than that of the third parasitic BJT.

10 . The ESD protection device according to claim 9 , wherein the first trigger element is disposed between the first SCR element and the second SCR element.

11 . The ESD protection device according to claim 4 , further comprising:
a second trigger element, having a third parasitic BJT formed in a substrate; and a second SCR element, having a fourth parasitic BJT formed in the substrate; wherein the third parasitic BJT and the fourth parasitic BJT has a common parasitic bipolar base, and the third parasitic BJT has a trigger voltage substantially lower than that of the fourth parasitic BJT.

12 . The ESD protection device according to claim 11 , wherein the second trigger element comprises a second MOS transistor comprising:
a third gate structure, disposed on the substrate; a third doping well having the first conductivity, disposed in the substrate and adjacent to the third gate structure; a seventh doping area having the first conductivity, disposed in the third doping well and separated from the third gate structure for a third distance; and a eight doping area having the first conductivity, disposed in the substrate, adjacent to the third gate structure and separated from the third doping well.

13 . The ESD protection device according to claim 12 , wherein the third parasitic BJT is formed between the seventh doping area, the eighth doping area and the substrate.

14 . The ESD protection device according to claim 12 , wherein the second SCR element comprises:
a fourth gate structure, disposed on the substrate; a fourth doping well, having the first conductivity, disposed in the substrate and adjacent to the fourth gate structure; a ninth doping area, having the first conductivity, disposed in the fourth doping well and separated from the fourth gate structure for a fourth distance; a tenth doping area, having a second conductivity, disposed in the fourth doping well, adjacent to one side of the ninth doping area depart from the fourth gate structure; a eleventh doping area, having the first conductivity, disposed in the fourth doping well, adjacent to the tenth doping area and separated from the ninth doping area by the tenth doping area; a twelfth doping area, having the first conductivity, disposed in the substrate, adjacent to the fourth gate structure and separated from the fourth doping well.

15 . The ESD protection device according to claim 14 , wherein the fourth parasitic BJT is formed between the eleventh doping area, the twelfth doping area and the substrate.

16 . The ESD protection device according to claim 14 , wherein the third distance is shorter than the fourth distance.

17 . The ESD protection device according to claim 14 , further comprises a guarding ring surrounding the first trigger element, the second trigger element, the first SCR element and the second SCR element.

18 . The ESD protection device according to claim 17 , wherein the first SCR element is disposed between the guarding ring and the first trigger element; and the second SCR element is disposed between the guarding ring and the second trigger element.

Assignees

• United Microelectronics Corp

Inventors

• Lin Ya-Ting
• Chen Yi-Chun
• Tang Tien-Hao

Classifications

• H10D89/713

  including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices · CPC title

• H10D62/126

  Top-view geometrical layouts of the regions or the junctions · CPC title

• H10D8/00

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title

• H10D89/814 Primary

  involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the FET, e.g. gate coupled transistors · CPC title

• H01L27/0274 Primary

  Electricity · mapped topic