Restricted instructions in transactional execution

Patent metadata

Field	Value
Publication number	US-2016357553-A1
Application number	US-201615238306-A
Country	US
Kind code	A1
Filing date	Aug 16, 2016
Priority date	Jun 15, 2012
Publication date	Dec 8, 2016
Grant date	—

Abstract

Restricted instructions are prohibited from execution within a transaction. There are classes of instructions that are restricted regardless of type of transaction: constrained or nonconstrained. There are instructions only restricted in constrained transactions, and there are instructions that are selectively restricted for given transactions based on controls specified on instructions used to initiate the transactions.

First claim

What is claimed is:

1 . A computer-implemented method of performing processing associated with transactional execution in a computing environment, the computer-implemented method comprising:
obtaining, by a processor, an instruction to be executed as part of a transaction; computing one or more effective controls from one or more controls set by one or more transaction begin instructions, wherein the one or more effective controls comprises an effective allow access register modification control that indicates whether an access register is permitted to be modified; determining by the processor whether the instruction is a selectively restricted instruction that is prohibited from execution within the transaction, the determining being based on the computed one or more effective controls; and performing processing associated with the instruction based on whether the instruction is selectively restricted.

2 . The computer-implemented method of claim 1 , wherein the performing comprises aborting the transaction based on the instruction being selectively restricted.

3 . The computer-implemented method of claim 2 , wherein the performing further comprises based on aborting the transaction, storing an abort code in a transaction diagnostic block identified by one transaction begin instruction of the one or more transaction begin instructions and setting a condition code.

4 . The computer-implemented method of claim 1 , wherein the performing comprises executing the instruction based on the determining indicating the instruction is not selectively restricted.

5 . The computer-implemented method of claim 1 , wherein the one or more effective controls further comprise an effective allow floating point operation control that indicates whether specified floating point instructions are permitted to be executed.

6 . The computer-implemented method of claim 1 , wherein based on the instruction being selectively restricted, the instruction is restricted for one transaction but not restricted for another transaction.

7 . The computer-implemented method of claim 1 , further comprising obtaining another instruction to be executed in the transaction and checking whether the other instruction is a restricted instruction for transactional processing, wherein the performing processing aborts the transaction based on the other instruction being restricted.

8 . The computer-implemented method of claim 7 , further comprising determining whether the transaction is a constrained transaction or a nonconstrained transaction, and wherein the checking whether the other instruction is restricted is based on whether the transaction is constrained or nonconstrained.

9 . The computer-implemented method of claim 8 , further comprising executing the constrained transaction as a nonconstrained transaction based on the other instruction being restricted exclusively for constrained transactions.

10 . The computer-implemented method of claim 1 , further comprising:
determining whether the transaction is a constrained transaction or a nonconstrained transaction; and providing an interrupt based on the transaction being a constrained transaction and the instruction being restricted.

11 . A computer-implemented method of performing processing associated with transactional execution in a computing environment, the computer-implemented method comprising:
obtaining, by a processor, an instruction to be executed as part of a transaction; computing one or more effective controls from one or more controls set by one or more transaction begin instructions, wherein the one or more effective controls comprises an effective allow floating point operation control that indicates whether specified floating point instructions are permitted to be executed; determining by the processor whether the instruction is a selectively restricted instruction that is prohibited from execution within the transaction, the determining being based on the computed one or more effective controls; and performing processing associated with the instruction based on whether the instruction is selectively restricted.

12 . The computer-implemented method of claim 11 , wherein the performing comprises aborting the transaction based on the instruction being selectively restricted.

13 . The computer-implemented method of claim 12 , wherein the performing further comprises based on aborting the transaction, storing an abort code in a transaction diagnostic block identified by one transaction begin instruction of the one or more transaction begin instructions and setting a condition code.

14 . The computer-implemented method of claim 11 , further comprising obtaining another instruction to be executed in the transaction and checking whether the other instruction is a restricted instruction for transactional processing, wherein the performing processing aborts the transaction based on the other instruction being restricted.

15 . The computer-implemented method of claim 14 , further comprising determining whether the transaction is a constrained transaction or a nonconstrained transaction, and wherein the checking whether the other instruction is restricted is based on whether the transaction is constrained or nonconstrained.

16 . A computer program product for performing processing associated with transactional execution in a computing environment, the computer program product comprising:
a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
obtaining, by a processor, an instruction to be executed as part of a transaction;
computing one or more effective controls from one or more controls set by one or more transaction begin instructions, wherein the one or more effective controls comprises an effective allow floating point operation control that indicates whether specified floating point instructions are permitted to be executed;
determining by the processor whether the instruction is a selectively restricted instruction that is prohibited from execution within the transaction, the determining being based on the computed one or more effective controls; and
performing processing associated with the instruction based on whether the instruction is selectively restricted.

17 . The computer program product of claim 16 , wherein the performing comprises aborting the transaction based on the instruction being selectively restricted.

18 . The computer program product of claim 17 , wherein the performing further comprises based on aborting the transaction, storing an abort code in a transaction diagnostic block identified by one transaction begin instruction of the one or more transaction begin instructions and setting a condition code.

19 . The computer program product of claim 16 , wherein the method further comprises obtaining another instruction to be executed in the transaction and checking whether the other instruction is a restricted instruction for transactional processing, wherein the performing processing aborts the transaction based on the other instruction being restricted.

20 . The computer program product of claim 19 , wherein the method further comprises determining whether the transaction is a constrained transaction or a nonconstrained transaction, and wherein the checking whether the other instruction is restricted is based on whether the transaction is constrained or nonconstrained.

Assignees

• IBM

Inventors

• Greiner Dan F
• Jacobi Christian
• Slegel Timothy J

Classifications

• G06F9/528

  by using speculative mechanisms · CPC title

• G06F9/30087 Primary

  Synchronisation or serialisation instructions · CPC title

• G06F9/3834

  Maintaining memory consistency · CPC title

• G06F9/3004 Primary

  to perform operations on memory · CPC title

• G06F9/467

  Transactional memory (G06F9/528 takes precedence) · CPC title