Memory system and operating method thereof

Patent metadata

Field	Value
Publication number	US-2016357480-A1
Application number	US-201514935509-A
Country	US
Kind code	A1
Filing date	Nov 9, 2015
Priority date	Jun 5, 2015
Publication date	Dec 8, 2016
Grant date	—

Abstract

A memory system includes a memory device including a plurality of blocks each comprising first and second regions of pages; and a controller suitable for storing a plurality of data in the first region and hot/cold information respectively corresponding to the plurality of data in the second region.

First claim

What is claimed is:

1 . A memory system comprising:
a memory device including a plurality of blocks each comprising first and second regions of pages; and a controller suitable for storing a plurality of data in the first region and hot/cold information respectively corresponding to the plurality of data in the second region.

2 . The memory system according to claim 1 , wherein the controller stores the plurality of data in the first region by units of pages.

3 . The memory system according to claim 2 ,
wherein each of the plurality of blocks comprises N number of pages (N is greater than 2), and wherein the first region comprises M numbers of pages (M is smaller than N).

4 . The memory system according to claim 3 , wherein the second region comprises N−M number of pages positioned rearmost in physical order in each of the plurality of blocks.

5 . The memory system according to claim 4 , wherein the hot/cold information is in the form of a bitmap, each bit of which represents the hot/cold information of each page of the first region.

6 . The memory system according to claim 3 , wherein the second region comprises N−M number of pages, each of which is positioned at every N/(N−M) th turn in physical order in each of the plurality of blocks.

7 . The memory system according to claim 6 , wherein the hot/cold information is in the form of a bitmap, each bit of which represents the hot/cold information of each page of the first region.

8 . The memory system according to claim 1 ,
wherein the controller further moves valid data stored in the first region of a victim block to one of hot and cold free blocks according to the hot/cold information stored in the second region of the victim block during a garbage collection operation, and wherein the victim block is one among the plurality of blocks.

9 . A memory system comprising:
a memory device including a plurality of blocks; and a controller suitable for storing a plurality of page data in the plurality of blocks, and storing hot/cold information respectively corresponding to the plurality of page data in a mapping table representing relationship between physical page addresses and logical addresses of the plurality of page data stored in the plurality of blocks.

10 . The memory system according to claim 9 ,
wherein the controller further moves valid data stored in a victim block to one of hot and cold free blocks according to the hot/cold information stored in the mapping table during a garbage collection operation, and wherein the victim block is one among the plurality of blocks.

11 . A method for operating a memory system including a memory device which includes a plurality of blocks each comprising first and second regions of pages, the method comprising:
storing a plurality of data in the first region; and storing hot/cold information respectively corresponding to the plurality of data in the second region.

12 . The method according to claim 11 wherein the storing of the plurality of data is performed by storing the plurality of data in the first region by units of pages.

13 . The method according to claim 12 ,
wherein each of the plurality of blocks comprises N number of pages (N is greater than 2), and wherein the first region comprises M numbers of pages (M is smaller than N).

14 . The method according to claim 13 , wherein the second region comprises N−M number of pages positioned rearmost in physical order in each of the plurality of blocks.

15 . The method according to claim 14 , wherein the hot/cold information is in the form of a bitmap, each bit of which represents the hot/cold information of each page of the first region.

16 . The method according to claim 13 , wherein the second region comprises N−M number of pages, each of which is positioned at every N/(N−M) th turn in physical order in each of the plurality of blocks.

17 . The method according to claim 16 , wherein the hot/cold information is in the form of a bitmap, each bit of which represents the hot/cold information of each page of the first region.

18 . The method according to claim 11 ,
further comprising moving valid data stored in the first region of a victim block to one of hot and cold free blocks according to the hot/cold information stored in the second region of the victim block during a garbage collection operation, wherein the victim block is one among the plurality of blocks.

19 . A method for operating a memory system including a memory device which includes a plurality of blocks, the method comprising:
storing a plurality of page data in the plurality of blocks; and storing hot/cold information respectively corresponding to the plurality of page data in a memory storing a mapping table representing a relationship between physical page addresses and logical addresses of the plurality of page data stored in the plurality of blocks.

20 . The method according to claim 19 ,
further comprising moving valid data stored in a victim block to one of hot and cold free blocks according to the hot/cold information stored in the memory during a garbage collection operation, wherein the victim block is one among the plurality of blocks.

Assignees

• Sk Hynix Inc

Inventors

• Choi Hae-Gi

Classifications

• G06F3/0679 Primary

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F2212/7205

  Cleaning, compaction, garbage collection, erase control · CPC title

• G06F12/0253

  Garbage collection, i.e. reclamation of unreferenced memory · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title