Touch display panel, detecting method thereof, and display device

US2016357283A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016357283-A1
Application numberUS-201514894049-A
CountryUS
Kind codeA1
Filing dateApr 14, 2015
Priority dateJan 21, 2015
Publication dateDec 8, 2016
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention discloses a touch display panel, a detecting method thereof, and a display device. The common electrode layer is divided into a plurality of independent self capacitance electrodes, and the common electrode is multiplexed as self capacitance electrodes. There is no need to provide an additional film, and it is only required to modify the pattern of the common electrode layer in the current LCD panel. Thus, the production cost is reduced, and the production efficiency is improved. Since the self capacitance electrodes are formed by dividing the common electrode layer in the above-mentioned touch display panel, a compensating electrode is further provided which is arranged in a layer different from that of the self capacitance electrodes, is insulated from the self capacitance electrodes, and at least covers a portion of a partition gap between neighboring self capacitance electrodes. A common electrode signal is applied to the compensating electrode during a display period. In this way, the common electrode signal which is applied to the compensating electrode during display can compensate the common electrode signal at partition gaps of the self capacitance, thus ensuring that liquid crystal molecules at partition gaps normally invert and that the overall display panel displays normally.

First claim

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1 - 15 . (canceled) 16 . A touch display panel, comprising: an upper substrate and a lower substrate which are arranged oppositely; a liquid crystal layer between the upper substrate and the lower substrate; a pixel electrode and a common electrode layer which are insulated from each other; and a plurality of wires; wherein the common electrode layer is divided into a plurality of self capacitance electrodes, and each self capacitance electrode is connected to one of the plurality of wires; a compensating electrode arranged in a layer different from that of the self capacitance electrodes and insulated from the self capacitance electrodes; wherein the compensating electrode at least covers a portion of a partition gap between neighboring self capacitance electrodes; wherein a common electrode signal is applied to the compensating electrode during a display period; and wherein the self capacitance electrodes, the wires, and the compensating electrode are arranged on a surface of one of the upper substrate and the lower substrate so that the self capacitance electrodes, the wires, and the compensating electrode face the other of the upper substrate and the lower substrate. 17 . The touch display panel of claim 16 , wherein the compensating electrode completely covers the partition gap between neighboring self capacitance electrodes. 18 . The touch display panel of claim 17 , wherein an orthographic projection of the compensating electrode onto the lower substrate forms a grid structure which at least covers all of the partition gaps between the self capacitance electrodes. 19 . The touch display panel of claim 16 , wherein the compensating electrode is made from a transparent electrically conductive material. 20 . The touch display panel of claim 16 , further comprising: a black matrix layer arranged on a surface of one of the upper substrate and the lower substrate so that the black matrix layer faces the other of the upper substrate and the lower substrate; and an orthographic projection of the partition gap between two neighboring self capacitance electrodes onto the lower substrate is within a region of the black matrix layer. 21 . The touch display panel of claim 20 , wherein: the self capacitance electrodes are arranged on a surface of the lower substrate facing the upper substrate; the pixel electrode is arranged above the common electrode layer; and the compensating electrode and the pixel electrode are arranged in the same layer. 22 . The touch display panel of claim 20 , wherein: the self capacitance electrodes are arranged on a surface of the lower substrate facing the upper substrate; the common electrode is arranged above the pixel electrode; and the compensating electrode is arranged above the common electrode. 23 . The touch display panel of claim 20 , wherein each wire is arranged in a layer different from that of the self capacitance electrodes, and each wire is connected to a corresponding self capacitance electrode through a via hole. 24 . The touch display panel of claim 23 , wherein an orthographic projection of each wire onto the lower substrate falls within a region of the black matrix layer. 25 . The touch display panel of claim 16 , further comprising: a touch detecting chip which is electrically connected to each wire; wherein the touch detecting chip is configured to apply a common electrode signal to each self capacitance electrode and the compensating electrode during a display period, and to determine a touch position by detecting a variation in the capacitance value of each self capacitance electrode during a touch period. 26 . The touch display panel of claim 16 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 27 . The touch display panel of claim 17 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 28 . The touch display panel of claim 18 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 29 . The touch display panel of claim 19 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 30 . The touch display panel of claim 20 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 31 . The touch display panel of claim 21 , wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode. 32 . A method of inspecting a touch display panel, comprising: providing a touch display panel comprising: an upper substrate and a lower substrate which are arranged oppositely; a liquid crystal layer between the upper substrate and the lower substrate; a pixel electrode and a common electrode layer which are insulated from each other; and a plurality of wires; wherein the common electrode layer is divided into a plurality of self capacitance electrodes, and each self capacitance electrode is connected to one of the plurality of wires; a compensating electrode arranged in a layer different from that of the self capacitance electrodes and insulated from the self capacitance electrodes; wherein the compensating electrode at least covers a portion of a partition gap between neighboring self capacitance electrodes; wherein a common electrode signal is applied to the compensating electrode during a display period; wherein the self capacitance electrodes, the wires, and the compensating electrode are arranged on a surface of one of the upper substrate and the lower substrate so that the self capacitance electrodes, the wires, and the compensating electrode face the other of the upper substrate and the lower substrate; and wherein the compensating electrode is an integral piece, and there is an overlapping region of a predefined size between the compensating electrode and each self capacitance electrode; prior to bonding the touch display panel to a driving chip, connecting the compensating electrode in each overlapping region with the self capacitance electrodes; applying a common electrode signal to the compensating electrode and a test signal to the pixel electrode; judging whether all pixels in the touch display panel display normally; cutting off the connection between the compensating electrode and the self capacitance electrode in each overlapping region so that the compensating electrode is insulated from each self capacitance electrode when all of the pixels display normally; determining that one or more self capacitance electrodes in the touch display panel are abnormal when not all of the pixels display normally; and bonding the touch display panel to the driving chip only when all of the pixels display normally. 33 . The method of inspecting a touch display panel of claim 32 , wherein connecting the compensating electrode in each overlapping region between the compensating electrode and each self capacitance electrode with the self capacitance electrodes is performed by las

Assignees

Inventors

Classifications

  • Matrix · CPC title

  • Support structures for LCD panels, e.g. frames or bezels · CPC title

  • common or background · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • Input devices, e.g. touch panels · CPC title

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What does patent US2016357283A1 cover?
The present invention discloses a touch display panel, a detecting method thereof, and a display device. The common electrode layer is divided into a plurality of independent self capacitance electrodes, and the common electrode is multiplexed as self capacitance electrodes. There is no need to provide an additional film, and it is only required to modify the pattern of the common electrode lay…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Beijing Boe Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/13338. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).