Methods and Apparatus for Full Parallax Light Field Display Systems

US2016357147A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016357147-A1
Application numberUS-201615243629-A
CountryUS
Kind codeA1
Filing dateAug 22, 2016
Priority dateApr 23, 2015
Publication dateDec 8, 2016
Grant date

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  1. Title

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Abstract

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A 3D video processing system with integrated display is described wherein the huge data bandwidth demands on the source-to-display transmission medium is decreased by utilizing innovative 3D light field video data compression at the source along with innovative reconstruction of 3D light field video content from highly compressed 3D video data at the display. The display incorporates parallel processing pipelines integrated with a Quantum Photonics Imager® for efficient data handling and light imaging.

First claim

Opening claim text (preview).

What is claimed is: 1 . A system for reproducing a light field for display from a compressed light field, the system comprising: at least one processing node having a plurality of hardware modules configured for decompressing the compressed light field and reproducing the light field for a display; each processing node having; an interface module an entropy decoder module an image inverse transform module a hogel content repetition module a forward DIBR module a backward DIBR module an error correction module an interleaver module, and a pixel modulator module each processing node having a bus interconnect for interconnecting the modules; and a plurality of memories a sequence controller, the sequence controller controlling the sequence of operation of the modules to decompress compressed light field data to reproduce the light field for display. 2 . The system of claim 1 wherein at least one of the modules is an application specific integrated circuit. 3 . The system of claim 2 wherein at least one of the modules is programmable. 4 . The system of claim 1 wherein the interface module is configured to receive data packets and deliver the data packets to the entropy encoder. 5 . The system of claim 1 wherein the entropy decoder module is configured to receive data packets from the entropy decoder and if the packet header indicates that the packet needs to be decoded, decoding the packet in accordance with the packet type. 6 . The system of claim 1 wherein the image transverse transform module is configured to receive from the entropy decoder module for blockwise seed and residual texture decoding and dequantization. 7 . The system of claim 6 wherein the image transverse transform module uses a predefined image transform matrix, thereby allowing an inverse transform instruction to serve as a pipelined single instruction, multiple data instruction. 8 . The system of claim 1 wherein the hogel content repetition module is configured for copying data between internal buffers having different lengths and different data widths without multiplicative scaling. 9 . The system of claim 1 wherein the forward DIBR module is configured to receive seed hogel disparity and produce warped disparity. 10 . The system of claim 9 wherein the backward DIBR module is configured to read the generated temporary disparity from the forward DIBR module and calculate the current hogel address reference position in the seed hogel texture and generate hogels. 11 . The system of claim 10 wherein the backward DIBR module is configured to also use residual disparity to combine with the seed disparity to fix disparity errors. 12 . The system of claim 1 wherein the backward DIBR module is also configured to fill pixel positions not referenced by the warping. 13 . The system of claim 1 wherein the error correction module is configured to correct artifacts. 14 . The system of claim 13 wherein the error correction module is also configured to perform color correction and the color space transform on an output of the error correction module. 15 . The system of claim 1 wherein the interleaver module is configured to transpose error corrected hogels to separate out individual bits per each hogel. 16 . The system of claim 1 wherein the pixel modulator is configured to provide a pixel modulator output compatible with whatever the pixel input requirements are of a light field display being used to display the reproduced light field.

Assignees

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Classifications

  • Recording image signals; Reproducing recorded image signals · CPC title

  • using cascaded computational arrangements for performing a single operation, e.g. filtering · CPC title

  • using transform coding · CPC title

  • Quantisation · CPC title

  • Metadata, e.g. disparity information · CPC title

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What does patent US2016357147A1 cover?
A 3D video processing system with integrated display is described wherein the huge data bandwidth demands on the source-to-display transmission medium is decreased by utilizing innovative 3D light field video data compression at the source along with innovative reconstruction of 3D light field video content from highly compressed 3D video data at the display. The display incorporates parallel p…
Who is the assignee on this patent?
Ostendo Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H04N13/161. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).