Apparatus and method for cell kill confirmation
US-12168779-B2 · Dec 17, 2024 · US
US2016356718A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016356718-A1 |
| Application number | US-201615176980-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 8, 2016 |
| Priority date | Jun 8, 2015 |
| Publication date | Dec 8, 2016 |
| Grant date | — |
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A pixel circuit that includes: a substrate body having a channel influenced by an electric field; an aperture in communication with the channel for receiving a fluorescent light input and moving electrons through the substrate body; and a plurality of sampling devices adapted to be switched on simultaneously to sample the moving electrons.
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1 . A method of optical imaging using a pixel circuit for use in fluorescence lifetime imaging, comprising the steps of: receiving at a pixel circuit a fluorescent light input emitted from a material; receiving electrical outputs from the pixel circuit in response to the light input; performing a center-of-mass method (CMM) calculation using the electrical outputs; and determining a lifetime parameter (τ) based on the CMM calculation. 2 . The method of claim 1 , wherein the lifetime parameter (τ) is determined without using a multiplier in the CMM calculation. 3 . The method of claim 1 , wherein the electrical outputs include a first electrical output (FD 1 ) that is received in response to a first triggering signal at a transfer gate (TX 1 ) and a second electrical output (FD 2 ) that is received in response to a second triggering signal at a transfer gate (T× 2 1 ), wherein the first triggering signal is related to the second triggering signal. 4 . The method of claim 3 , wherein the CMM calculation comprises determining a first summation (Q 1 ) for a finite number (N) of sampling periods associated with the first electrical output and determining a second summation (Q 2 ) of the same finite number (N) of sampling periods associated with the second electrical output, wherein the lifetime parameter (τ) is approximated as Q 2 /(Q 1 +Q2). 5 . The method of claim 4 , wherein the first summation (Q 1 ) expressed as a function of time (t) is: Q 1 =ƒ 0 Δ f ( t ) dt+ƒ 0 2Δ f ( t ) dt+ . . . +ƒ 0 T−Δ f ( t ) dt =Σ( N−n )· f[n], wherein Δ is a sampling period, wherein T is a period between excitation pulses, wherein N is the number of sampling periods, wherein n is a discrete representation of time (t). 6 . The method of claim 5 , wherein the first summation (Q 2 ) expressed as a function of time (t) is: Q 2=ƒ 0 T f ( t ) dt+ƒ Δ T f ( t ) dt+ . . . +ƒ T−Δ T f ( t ) dt=Σn·f[n]. 7 . A pixel circuit, comprising: a substrate body having a channel configured to be influenced by an electric field; an aperture in communication with the channel such that a fluorescent light input received by the aperture causes electrons to move along the channel through the substrate body in the presence of the electric field; and a plurality of sampling devices spaced along the channel and adapted to be switched on simultaneously so that the pixel circuit samples the moving electrons at different locations along the channel. 8 . The pixel circuit of claim 7 , wherein the substrate body comprises a p+ region in communication with an n-type region. 9 . The pixel circuit of claim 7 , further comprising a plurality of taps for receiving the sampled electrons distributed along at least a portion of the channel. 10 . The pixel circuit of claim 9 , wherein for each of the plurality of taps, there is an associated one of the plurality of sampling devices, wherein the pixel circuit comprises more than two taps and more than two sampling devices. 11 . An analog-to-digital (ADC) circuit, comprising: a coarse resolution ADC circuit; and a fine resolution ADC circuit, wherein the fine resolution ADC circuit includes a charge redistribution digital-to-analog converter (DAC). 12 . The ADC circuit of claim 11 , wherein the coarse resolution ADC circuit is a Sigma Delta ADC circuit. 13 . The ADC circuit of claim 11 , wherein the charge redistribution DAC includes a plurality of capacitors coupled to a plurality of voltage reference rails via a switching bank. 14 . The ADC circuit of claim 13 , wherein a plate of each of the plurality of capacitors is coupled to the switching bank. 15 . A method of compression for use in fluorescence lifetime imaging, comprising the steps of: receiving at an analog-to-digital conversion (ADC) circuit an input from a pixel circuit; determining a coarse resolution value using a coarse resolution circuit, wherein the coarse resolution includes determining a weighted sum of a finite number of samples; determining a fine resolution value using a fine resolution circuit; and providing the fine and coarse resolution values as an output. 16 . The method of claim 15 , wherein determining the fine resolution value comprises using a charge redistribution digital-to-analog converter (DAC) to minimize a quantity of ADC cycles. 17 . A method of compression for use in fluorescence lifetime imaging, comprising the steps of: receiving at an analog-to-digital conversion (ADC) circuit an input from a pixel circuit; determining a coarse resolution value using a coarse resolution circuit; determining a fine resolution value using a fine resolution circuit, wherein determining the fine resolution value comprises using a charge redistribution digital-to-analog converter (DAC) to minimize a quantity of ADC cycles; and providing the fine and coarse resolution values as an output.
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