Electrodeposited Nano-Twins Copper Layer and Method of Fabricating the Same

Patent metadata

Field	Value
Publication number	US-2016355940-A1
Application number	US-201615238345-A
Country	US
Kind code	A1
Filing date	Aug 16, 2016
Priority date	Nov 16, 2011
Publication date	Dec 8, 2016
Grant date	—

Abstract

An electrodeposited nano-twins copper layer, a method of fabricating the same, and a substrate comprising the same are disclosed. According to the present invention, at least 50% in volume of the electrodeposited nano-twins copper layer comprises plural grains adjacent to each other, wherein the said grains are made of stacked twins, the angle of the stacking directions of the nano-twins between one grain and the neighboring grain is between 0 to 20 degrees. The electrodeposited nano-twins copper layer of the present invention is highly reliable with excellent electro-migration resistance, hardness, and Young's modulus. Its manufacturing method is also fully compatible to semiconductor process.

First claim

What is claimed is:

1 . A method for preparing a nano-twins copper metal layer, comprising:
(A) providing an electrodepositing device, wherein the electrodepositing device comprises an anode, a cathode, a plating solution, and an electrical power supply source, and the electrical power supply source is connected to the anode and the cathode; and (B) using the electrical power supply source to provide an electrical power to perform electrodeposition at a surface of the anode to grow a nano-twins copper metal layer; wherein over 50% of a volume of the nano-twins copper metal layer comprises a plurality of crystal grains, each crystal grain is connected with one another, each crystal grain is formed as a result of a plurality of nano-twins stacking in a direction of a [111] crystal axis, and an angle included between neighboring crystal grains is 0° to 20°; wherein the plating solution comprises a copper-based salinized substrate, an acid, and a chloride anion supply source.

2 . The method according to claim 1 , wherein a [111] surface of the nano-twins is exposed on over 50% of a surface area of the nano-twins copper metal layer.

3 . The method according to claim 1 , wherein a diameter of the crystal grains is in a range of 0.01 μm-500 μm and a thickness of the crystal grains is in a range of 0.01 μm-500 μm.

4 . The method according to claim 1 , wherein a diameter of the crystal grains is in a range of 1 μm-10 μm and a thickness of the crystal grains is in a range of 0.1 μm-200 μm.

5 . The method according to claim 1 , wherein the plating solution further comprises a substance selected from a group consisting of gelatin, surfactant, lattice dressing agent, and a combination thereof.

6 . The method according to claim 1 , wherein the acid in the plating solution is sulfuric acid, methyl sulfonate, or a combination thereof.

7 . The method according to claim 1 , wherein a concentration of the acid in the plating solution is 80-120 g/L.

8 . The method according to claim 1 , wherein in step (B), a current density for electrodeposition is 10-120 mA/cm 2 .

9 . The method according to claim 1 , wherein a growth rate of the nano-twins copper metal layer is 0.22 μm/min-2.64 μm/min.

10 . The method according to claim 1 , wherein in step (B), a growth rate of a twins metal is 1.5 μm/min-2 μm/min when a current density for electrodeposition is 80 mA/cm 2 .

11 . The method according to claim 1 , wherein in step (B), electrodeposition is carried out by direct current electrodeposition, high-speed pulse electrodeposition, or both interchangeably.

12 . The method according to claim 1 , wherein the method is used in a preparation of through silicon via (TSV), interconnect of a semiconductor chip, pin through hole of a packaging substrate, metal wire, or substrate circuit.

13 . The method according to claim 1 , wherein the cathode is a substrate with a seed layer on a surface of the substrate, or a metal substrate.

14 . The method according to claim 13 , wherein the substrate is selected from a group consisting of silicon substrate, glass substrate, quartz substrate, plastic substrate, printed circuit board, III-V group material substrate, and a combination thereof.

15 . The method according to claim 1 , wherein in step (B), when the electrodeposition is in progress, the anode or the plating solution is spun at a rotational speed of 50 rpm-1500 rpm.

Assignees

• Univ Nat Chiao Tung

Inventors

• Chen Chih
• Tu King-Ning
• Liu Taochi

Classifications

• H10P14/47

  Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title

• C25D21/10

  Agitating of electrolytes; Moving of racks · CPC title

• C25D5/18

  Electroplating using modulated, pulsed or reversing current · CPC title