Calibration method for channel simulator

US2016353289A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016353289-A1
Application numberUS-201615165434-A
CountryUS
Kind codeA1
Filing dateMay 26, 2016
Priority dateMay 27, 2015
Publication dateDec 1, 2016
Grant date

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Abstract

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A calibration method for a channel simulator is applied to a large-capacity channel simulator having the interfaces of P base stations and Q terminals so that path loss calibration for P×Q paths is more rapidly and easily performed.

First claim

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What is claimed is: 1 . A calibration method for a channel simulator that forms channels with respect to all paths between P base stations (P is an integer more than 2) and Q terminals (Q is an integer more than 2), the calibration method comprising: a base station power calibration step of equally maintaining P ADC powers of base station interface cards of the channel simulator; and a terminal path loss calibration step of equally maintaining Q DAC powers of terminal interface cards of the channel simulator in a state that one base station subject to the power calibration is connected with the Q terminals. 2 . The calibration method of claim 1 , wherein the base station power calibration step comprises a step of adjusting a gain of an amplifier or an attenuation degree of an attenuator of the base station interface cards after measuring the P ADC powers of the base station interface cards of the channel simulator connected with the base stations. 3 . The calibration method of claim 1 , wherein, in the terminal path loss calibration step, one base station is connected with the Q terminals, and the gain of the amplifier or the attenuation degree of the attenuator of the terminal interface cards in the channel simulator connected with the terminals is adjusted using RSRP or a path loss value of each terminal, such that the DAC, powers of the terminal interface cards are equally maintained. 4 . The calibration method of claim 3 , wherein the RSRP or the path loss value of the terminal is acquired through a DM message from each terminal. 5 . A calibration method for a channel simulator, in which channels are formed with respect to all paths between P base stations (P is an integer more than 2) and Q terminals (Q is an integer more than 2), the calibration method comprising: (a) inputting a base station signal having equal power after connecting the P base stations with one terminal; (b) capturing and measuring ADC powers of base station interface cards connected with the base stations; (c) performing calibration such that the ADC powers measured in step (b) are equal to each other; (d) checking RSRP or a path loss value of each terminal after inputting the base station signal in a state that one base station is connected with the Q terminals and (e) performing the calibration such that DAC values of terminal interface cards connected with the terminals are equal to each other using the RSRP and the path loss value. 6 . The calibration method of claim 5 , wherein the calibration in step (c) is performed by adjusting a gain of an amplifier or an attenuation degree of an attenuator of the base station interface cards; and the calibration in step (e) is performed by adjusting a gain of an amplifier or an attenuation degree of an attenuator of the terminal interface card. 7 . The calibration method of claim 6 , wherein the RSRP and the path loss value of the terminal are acquired through a DM message from each terminal.

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Classifications

  • Packet loss · CPC title

  • for initial configuration or provisioning, e.g. plug-and-play · CPC title

  • Simulation models, e.g. distribution of spectral power density or received signal strength indicator [RSSI] for a given geographic region · CPC title

  • of power amplifiers, e.g. gain or non-linearity · CPC title

  • using statistical or mathematical methods · CPC title

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What does patent US2016353289A1 cover?
A calibration method for a channel simulator is applied to a large-capacity channel simulator having the interfaces of P base stations and Q terminals so that path loss calibration for P×Q paths is more rapidly and easily performed.
Who is the assignee on this patent?
Innowireless Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04B17/3912. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).