Image sensor

Patent metadata

Field	Value
Publication number	US-2016353045-A1
Application number	US-201515116732-A
Country	US
Kind code	A1
Filing date	Feb 6, 2015
Priority date	Feb 7, 2014
Publication date	Dec 1, 2016
Grant date	—

Abstract

A high-accurate imaging increased in time resolution can be made. The camera device is provided with a plurality of pixels that include a light-receiving surface embedded region to convert incident light into charges, a charge accumulation region to accumulate the charges, and a gate electrode to control the charges to be transferred from the light-receiving surface embedded region to the charge accumulation region, and are one-dimensionally arranged in each of a plurality of columns, a timing generation circuit which generates a control pulse voltage to be applied to the gate electrode, and a correction circuit unit which is provided in accordance with each of a plurality of columns of the pixels, delays the control pulse voltage in a variable time, and applies the control pulse voltage to the gate electrodes of the plurality of pixels belonging to a column corresponding to the control pulse voltage.

First claim

1 . An image sensor comprising:
a plurality of photoelectric conversion elements including a light-receiver to convert incident light into charges, a charge accumulation unit to accumulate the charges, and a gate electrode to control the charges to be transferred from the light-receiver to the charge accumulation unit, and are one-dimensionally arranged in each of a plurality of columns; a clock input unit inputting a control clock to be applied to the gate electrode; and a first delay adjustment unit provided in correspondence with each of the plurality of columns which the photoelectric conversion elements or a group of the photoelectric conversion elements are arranged in, delaying the control clock input by the clock input unit in a variable time, applying the control clock to the gate electrodes of the plurality of photoelectric conversion elements belonging to a corresponding column.

2 . The image sensor according to claim 1 ,
wherein the first delay adjustment unit includes
a storage unit that stores a value for determining a delay time, and
a delay adjustment circuit that changes the signal delay characteristic according to the value stored in the storage unit.

3 . The image sensor according to claim 1 ,
wherein the plurality of photoelectric conversion elements or a group of the plurality of photoelectric conversion elements are further one-dimensionally arranged in each of a plurality of rows, the plurality of photoelectric conversion elements or the group of the plurality of photoelectric conversion elements further comprising: a second delay adjustment unit delaying the control clock input by the clock input unit in a variable time for each of the plurality of rows, applying the control clock to the gate electrodes of the plurality of photoelectric conversion elements belonging to a row to which the control clock corresponds.

4 . The image sensor according to claim 3 ,
wherein the second delay adjustment circuit includes
a storage unit provided in accordance with each of the plurality of rows of the photoelectric conversion elements, storing a value for determining a delay time, and
a delay adjustment circuit provided for each of the plurality of photoelectric conversion elements, changing the signal delay characteristic for each row of the photoelectric conversion elements in accordance with the value stored in the storage unit.

5 . The image sensor according to claim 3 ,
wherein the second delay adjustment circuit includes
a storage unit provided for each of the plurality of photoelectric conversion elements, storing a value for determining a delay time, and
a delay adjustment circuit provided for each of the plurality of photoelectric conversion elements, changing the signal delay characteristic for each pixel to which the photoelectric conversion element belongs in accordance with the value stored in the storage unit.

6 . The image sensor according to claim 3 ,
wherein the second delay adjustment circuit includes
a storage unit provided for each group of the plurality of photoelectric conversion elements, storing a value for determining a delay time,
a delay adjustment circuit provided for each group of the plurality of photoelectric conversion elements, changing the signal delay characteristic for each group of the photoelectric conversion elements in accordance with the value stored in the storage unit.

Assignees

• Univ Shizuoka Nat Univ Corp

Inventors

• Kawahito Shoji
• Yasutomi Keita

Classifications

• G01S7/4863 Primary

  Detector arrays, e.g. charge-transfer gates · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N23/56

  provided with illuminating means · CPC title

• G01S17/894

  Three-dimensional [3D] imaging with simultaneous measurement of time-of-flight at a two-dimensional [2D] array of receiver pixels, e.g. time-of-flight cameras or flash lidar · CPC title

• H10F39/80373

  characterised by the gate of the transistor · CPC title