Method of manufacturing semiconductor substrate and substrate for semiconductor growth

Patent metadata

Field	Value
Publication number	US-2016351748-A1
Application number	US-201615130379-A
Country	US
Kind code	A1
Filing date	Apr 15, 2016
Priority date	May 27, 2015
Publication date	Dec 1, 2016
Grant date	—

Abstract

A method of manufacturing a semiconductor substrate may include: forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer including filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.

First claim

1 . A method of manufacturing a semiconductor substrate, the method comprising:
forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer comprising filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.

2 . The method of claim 1 , wherein the buffer layer protrudes in the plurality of cavities in plan view to form an undercut region within each of the plurality of cavities.

3 . The method of claim 1 , wherein the growing the semiconductor layer comprises covering the plurality of cavities with the semiconductor layer to form closed regions between the semiconductor layer and the growth substrate.

4 . The method of claim 1 , wherein the separating comprises generating a crack from the plurality of cavities in a transverse direction along the boundary between the buffer layer and the growth substrate.

5 .- 6 . (canceled)

7 . The method of claim 1 , wherein the forming the plurality of cavities comprises defining surfaces of each of the plurality of cavities in accordance with crystal planes of the growth substrate.

8 . The method of claim 7 , wherein each of the plurality of cavities comprises at least seven surfaces.

9 . The method of claim 1 , wherein at least one surface of each of the plurality of cavities comprises a negative slope such that a cross-sectional area of the growth substrate decreases in a direction away from the buffer layer.

10 .- 13 . (canceled)

14 . The method of claim 1 , wherein a ratio of a diameter of each of the plurality of openings to a distance between adjacent openings of the plurality of openings ranges from 0.65 to 18.

15 . The method of claim 1 , further comprising forming a growth suppressing layer on a surface of the growth substrate exposed through the plurality of cavities.

16 . The method of claim 15 , wherein the forming the growth suppressing layer comprises treating the growth substrate with ammonia.

17 .- 20 . (canceled)

21 . A method of manufacturing a semiconductor substrate, the method comprising:
providing a buffer layer on a growth substrate; forming at least one opening and at least one cavity in the buffer layer and in the growth substrate, respectively; growing a semiconductor layer from the buffer layer including the opening; and separating the buffer layer and the semiconductor layer from the growth substrate using a difference in coefficients of thermal expansion between the growth substrate and the buffer layer at the at least one cavity.

22 . The method of claim 21 , wherein the forming the at least one opening and the at least one cavity comprises forming an undercut region within the at least one cavity, the undercut region being generated due to a difference between a width of the at least one opening and a width of the at least one cavity.

23 . The method of claim 22 , wherein the buffer layer overhangs over the at least one cavity of the growth substrate to form the undercut region within the at least one cavity.

24 . The method of claim 21 , wherein a maximum length of the at least one opening measured along a junction surface between the growth substrate and the buffer layer is smaller than a maximum length of the at least one cavity measured along the junction surface, the junction surface corresponding to a surface where the growth substrate and the buffer layer are joined.

25 . The method of claim 24 , wherein an area of the opening on the junction surface ranges from 20% to 90% of an area of the buffer layer on the junction surface.

26 . The method of claim 21 , wherein the at least one opening and the at least one cavity are concentric.

27 . The method of claim 21 , wherein the at least one cavity comprises a plurality of cavities, and
wherein the forming the at least one cavity comprises forming the plurality of cavities only in one of an inner portion or an outer portion of the growth substrate.

28 . A method of manufacturing a semiconductor substrate, the method comprising:
providing a buffer layer on a growth substrate; forming at least one opening and at least one cavity in the buffer layer and in the growth substrate, respectively, the at least one opening and the at least one cavity being concentric to each other; growing a semiconductor layer from the buffer layer including the at least one opening; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein the buffer layer overhangs over the at least one cavity of the growth substrate to form an undercut region within the at least one cavity.

29 . The method of claim 28 , wherein the separating comprises separating using a difference in coefficients of thermal expansion between the growth substrate and the buffer layer at the at least one cavity.

30 . The method of claim 28 , wherein the at least one cavity comprises a plurality of cavities, and
wherein the forming the at least one cavity comprises forming the plurality of cavities only in one of an inner portion or an outer portion of the growth substrate.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Young Hwan
• Kang Sam Mook
• Kim Jun Youn
• Kim Mi Hyun
• Kim Joo Sung
• Tak Young Jo

Classifications

• H10P14/3416

  Nitrides · CPC title

• H10P14/3242

  Structure · CPC title

• H10P14/3216

  Nitrides · CPC title

• H10P14/3202

  Materials thereof · CPC title

• H10P14/278

  Pendeoepitaxy · CPC title