Display device
US-2024431161-A1 · Dec 26, 2024 · US
US2016351640A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016351640-A1 |
| Application number | US-201615236198-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 12, 2016 |
| Priority date | Sep 30, 2013 |
| Publication date | Dec 1, 2016 |
| Grant date | — |
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A display device includes a substrate including a display region and a peripheral region, display structures at the display region of the substrate, a plurality of blocking structures at the peripheral region of the substrate wherein the blocking structures have heights different from each other, an organic layer on the display structures and the blocking structures, and an inorganic layer on the organic layer.
Opening claim text (preview).
What is claimed is: 1 . A method of manufacturing a display device, the method comprising: providing a substrate comprising a display region and a peripheral region; forming a plurality of display structures at the display region of the substrate; forming a plurality of blocking structures having heights different from each other at the peripheral region of the substrate; and alternately forming an organic layer and an inorganic layer on the display structures and the blocking structures. 2 . The method of manufacturing the display device of claim 1 , further comprising: forming transistors, an insulating interlayer, and wirings on the substrate; forming an insulation layer on the insulating interlayer to cover the transistors and the wirings; and forming a protection member at the peripheral region of the substrate to cover the insulation layer and an outermost wiring of the wirings. 3 . The method of manufacturing the display device of claim 2 , wherein the forming of the plurality of blocking structures comprises: forming a metal layer pattern adjacent to the outermost wiring; forming a first insulation layer pattern on a portion of the outermost wiring; and forming a second insulation layer pattern on the metal layer pattern. 4 . The method of manufacturing the display device of claim 3 , wherein the outermost wiring and the metal layer pattern are concurrently formed, and wherein the first and the second insulation layer patterns and the insulation layer are concurrently formed. 5 . The method of manufacturing the display device of claim 3 , wherein the forming of the plurality of display structures comprises: forming first electrodes on the insulation layer; forming a pixel defining layer and a spacer on the insulation layer, the pixel defining layer partially exposing the first electrodes; forming light emitting layers on each of the exposed first electrodes; and forming a second electrode on the light emitting layers, the pixel defining layer, and the spacer. 6 . The method of manufacturing a display device of claim 5 , wherein forming the plurality of blocking structures further comprises: forming a third insulation layer pattern on the protection member; forming a fourth insulation layer pattern on the first insulation layer pattern; forming a fifth insulation layer pattern on the second insulation layer pattern; and forming a sixth insulation layer pattern on the fifth insulation layer pattern. 7 . The method of manufacturing a display device of claim 6 , wherein the third insulation layer pattern, the fourth insulation layer pattern, and the fifth insulation layer pattern are concurrently formed with the pixel defining layer. 8 . The method of manufacturing a display device of claim 6 , wherein the sixth insulation layer pattern and the spacer are concurrently formed.
multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title
Vertical spacers, e.g. arranged between the sealing arrangement and the OLED · CPC title
Pixel-defining structures or layers, e.g. banks · CPC title
Insulating layers formed between TFT elements and OLED elements · CPC title
Electricity · mapped topic
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