Semiconductor device and semiconductor device manufacturing method

Patent metadata

Field	Value
Publication number	US-2016351442-A1
Application number	US-201415111048-A
Country	US
Kind code	A1
Filing date	Sep 17, 2014
Priority date	Mar 27, 2014
Publication date	Dec 1, 2016
Grant date	—

Abstract

According to present invention, a semiconductor device includes a semiconductor substrate formed of GaAs, an adhesion layer formed of Pd or an alloy containing Pd on the semiconductor substrate, a barrier layer formed of Co or an alloy containing Co on the adhesion layer, and a metal layer formed of Cu, Ag or Au on the barrier layer.

First claim

1 . A semiconductor device comprising:
a semiconductor substrate formed of GaAs; an adhesion layer formed of Pd or an alloy containing Pd on the semiconductor substrate; a barrier layer formed of Co or an alloy containing Co on the adhesion layer; and a metal layer formed of Cu, Ag or Au on the barrier layer.

2 . The semiconductor device according to claim 1 , wherein part of the adhesion layer is formed of Pd—Ga—As.

3 . The semiconductor device according to claim 1 , wherein the entire adhesion layer is formed of Pd—Ga—As.

4 . The semiconductor device according to claim 1 , comprising an alloy layer containing Co and Pd between the adhesion layer and the barrier layer.

5 . The semiconductor device according to claim 1 , wherein the layer thickness of the adhesion layer is equal to or larger than 1 nm and equal to or smaller than 30 nm.

6 . The semiconductor device according to claim 1 , wherein the adhesion layer is formed of Pd—P.

7 . The semiconductor device according to claim 1 , wherein the barrier layer is formed of Co—P or Co—W—P.

8 . A method of manufacturing a semiconductor device, comprising:
a step of forming an adhesion layer of Pd or an alloy containing Pd on a semiconductor substrate formed of GaAs; a step of forming a barrier layer of Co or an alloy containing Co on the adhesion layer; and a heat treatment step of increasing the temperature of the semiconductor substrate, the adhesion layer and the barrier layer to 25° C. to 250° C. to form Pd—Ga—As on the adhesion layer and to form an alloy layer containing Co and Pd between the adhesion layer and the barrier layer.

9 . The method of manufacturing a semiconductor device according to claim 8 , comprising a step of forming a metal layer of Cu, Ag or Au on the barrier layer before the heat treatment step.

10 . A method of manufacturing a semiconductor device, comprising:
a step of forming an adhesion layer of Pd or an alloy containing Pd on a semiconductor substrate formed of GaAs; a step of performing electroless plating on the semiconductor substrate to form a barrier layer of Co—P or Co—W—P on the adhesion layer; and a step of forming a metal layer of Cu, Ag or Au on the barrier layer.

11 . The method of manufacturing a semiconductor device according to claim 10 , wherein the metal layer is of a two-layer structure having Au in a lower layer and having Cu in an upper layer.

Assignees

• Mitsubishi Electric Corp

Inventors

• Nishizawa Koichiro

Classifications

• H10D64/0116

  to Group III-V semiconductors · CPC title

• H10W20/0698

  Local interconnections · CPC title

• H10W20/0526

  by thermal treatment thereof · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title