Generalized product codes for flash storage

Patent metadata

Field	Value
Publication number	US-2016342467-A1
Application number	US-201615158425-A
Country	US
Kind code	A1
Filing date	May 18, 2016
Priority date	May 18, 2015
Publication date	Nov 24, 2016
Grant date	—

Abstract

Memory systems may include an encoder suitable for arranging data in rows of data blocks as a plurality of codewords, and permuting the data block rows and constructing row parities on the permuted rows, and a decoder suitable for decoding the codewords, and correcting stuck error patterns when decoding of the codewords fails.

First claim

What is claimed is:

1 . A memory system, comprising:
an encoder suitable for:
arranging data in rotes of data blocks as a plurality of codewords; and
permuting the data block rows and constructing row parities on the permuted rows; and
a decoder suitable for:
decoding the codewords; and
correcting stuck error patterns when decoding of the codewords fails.

2 . The memory system of claim 1 , wherein the data block rows are permuted such that each data block is included in at least two rows.

3 . The memory system of claim 1 , wherein the encoder is further suitable for constructing a parity on the parities of the permuted rows.

4 . The memory system of claim 1 , wherein each data block includes a same number of bits.

5 . The memory system of claim 1 , wherein the encoder is further suitable for generating an XOR parity and storing, the XOR parity in at least one data block row.

6 . The memory system of claim 5 , wherein the XOR parity is generated by taking an XOR of the data blocks and a predetermined number of constructed row parities.

7 . The memory system of claim 5 , wherein the decoder is suitable for correcting stuck error patterns by:
constructing an XOR parity from the decoded codewords; and determining a location of a stuck error pattern based on a difference between the XOR parity constructed by the decoder and the XOR parity stored by the encoder.

8 . The memory system of claim 5 , wherein the decoder is suitable for correcting stuck error patterns by:
determining an error location intersection of a pair of failed codewords; and flipping a bit at the error location intersection.

9 . A method, comprising:
arranging, with an encoder, data in rows of data blocks as a plurality of codewords; permuting, with the encoder, the data block rows and constructing row parities on the permuted rows; decoding, with a decoder, the codewords; and correcting, with the decoder, stuck error patterns when decoding of the codewords fails.

10 . The method of claim 9 , wherein the data block rows are permuted such that each data block is included in at least two rows.

11 . The method of claim 9 , further comprising constructing, with the encoder, a parity on the parities of the permuted rows.

12 . The method of claim 9 , wherein each data block includes a same number of bits.

13 . The method of claim 9 , further comprising generating, with the encoder, an XOR parity and storing the XOR parity in at least one data block row.

14 . The method of claim 13 , wherein the XOR parity is generated by taking an XOR of the data blocks and a predetermined number of constructed row parities.

15 . The method of claim herein the correcting stuck error patterns step further comprises:
constructing, with the decoder, an XOR parity from the decoded codewords; and determining a location of a stuck error pattern based on a difference between the XOR parity constructed by the decoder and the XOR parity stored by the encoder.

16 . The method of claim wherein the correcting stuck error patterns step includes:
determining with the decoder, an error location intersection of a pair of failed codewords; and flipping a bit at the error location intersection.

17 . A memory device, comprising:
an encoder configured to:
arrange data in rows of data blocks as a plurality of codewords; and
permute the data block rows and construct row parities on the permuted rows; and
a decoder configured to:
decode the codewords; and
correct stuck error patterns when decoding of the codewords fails.

18 . The memory device of claim 17 , wherein the encoder is further configured to generate an XOR parity and store the XOR parity in at least one data block row.

19 . The memory device of claim 18 , wherein the XOR parity is generated by taking an XOR of the data blocks and a predetermined number of constructed row parities.

20 . The memory device of claim 19 , wherein the decoder is further configured to correct stuck error patterns by:
constructing an XOR parity from the decoded codewords; and determining a location of a stuck error pattern based on a difference between the XOR parity constructed by the decoder and the XOR parity stored by the encoder.

Assignees

• Sk Hynix Memory Solutions Inc

Inventors

• Kumar Naveen
• Bhatia Aman
• Zeng Lingqi

Classifications

• G11C2029/0409

  Online test · CPC title

• G06F11/1096

  Parity calculation or recalculation after configuration or reconfiguration of the system · CPC title

• G11C2029/0411

  Online error correction · CPC title

• G11C29/42 Primary

  using error correcting codes [ECC] or parity check · CPC title

• G06F11/1008

  in individual solid state devices (G06F11/1004 takes precedence) · CPC title