Semiconductor device having internal voltage generating circuit

Patent metadata

Field	Value
Publication number	US-2016342164-A1
Application number	US-201615230902-A
Country	US
Kind code	A1
Filing date	Aug 8, 2016
Priority date	Nov 30, 2009
Publication date	Nov 24, 2016
Grant date	—

Abstract

A semiconductor device including a first internal voltage generating circuit that includes a capacitor including a first electrode and a second electrode, and the first internal voltage generating circuit to generate an internal voltage by charging the capacitor to a first voltage and applying a second voltage to the first electrode of the capacitor to generate a third voltage that is greater than the first and the second voltages on the second electrode in absolute value, and a control circuit to perform a control by applying a fourth voltage that is less than the first voltage to the capacitor when the first internal voltage generating circuit is in a standby state.

First claim

What is claimed is:

1 . A method for controlling a charge pump comprising:
alternatively charging a first capacitor to a first voltage difference and discharging the first capacitor by applying a second voltage to a first electrode of the first capacitor to generate a third voltage greater in absolute value than the first voltage difference and greater in absolute value than the second voltage on a second electrode of the first capacitor in an active state of the charge pump; and applying a fourth voltage difference less than the first voltage difference to the first capacitor in a standby state of the charge pump.

2 . The method as claimed in claim 1 , wherein the first voltage difference is VDD and the second voltage is VDD.

3 . The method as claimed in claim 2 , wherein the fourth voltage difference is VDD-Vt.

4 . The method as claimed in claim 2 , wherein the fourth voltage difference is Vt.

5 . The method as claimed in claim 2 , wherein the third voltage is 2VDD.

6 . The method as claimed in claim 1 , wherein the first capacitor is a MOS gate capacitor.

7 . The method as claimed in claim 1 , further comprising alternatively charging a second capacitor to the first voltage difference and discharging the second capacitor by applying the third voltage to a first electrode of the second capacitor to generate a fifth voltage greater in absolute value than the third voltage on a second electrode of the second capacitor in the active state of the charge pump.

8 . The method as claimed in claim 7 , further comprising applying a sixth voltage difference less than the first voltage difference to the second capacitor in the standby state of the charge pump.

9 . The method as claimed in claim 8 , wherein the sixth voltage difference is zero.

10 . The method as claimed in claim 7 , wherein the first voltage difference is VDD and the second voltage is VDD.

11 . The method as claimed in claim 10 , wherein the fourth voltage difference is VDD-Vt.

12 . The method as claimed in claim 10 , wherein the fourth voltage difference is Vt.

13 . The method as claimed in claim 10 , wherein the third voltage is 2VDD and the fifth voltage is 3VDD.

14 . The method as claimed in claim 7 , wherein the first and second capacitors are MOS gate capacitors.

Assignees

• Ps4 Luxco Sarl

Inventors

• Hayashi Koichiro

Classifications

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G05F1/465 Primary

  Internal voltage generators for integrated circuits, e.g. step down generators · CPC title

• H02M1/0032

  Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title