Digital accessory interface

Patent metadata

Field	Value
Publication number	US-2016337113-A1
Application number	US-201514928382-A
Country	US
Kind code	A1
Filing date	Oct 30, 2015
Priority date	May 11, 2015
Publication date	Nov 17, 2016
Grant date	—

Abstract

A method is used for transferring data over a half-duplex wired communications link, wherein the wired communications link comprises first and second wires. The method comprises, in each of a plurality of frames: transferring a clock signal on the first wire in a first direction; transferring first payload data on the second wire in the first direction; transferring second payload data on the second wire in a second direction opposite to the first direction; and transferring control data on the second wire, wherein the format of the frame is such that, irrespective of whether the control data is transferred in the first direction or in the second direction, there is only one pair of reversals of a direction of data transfer in each frame.

First claim

1 . A method for transferring data over a half-duplex wired communications link, wherein the wired communications link comprises first and second wires, and wherein the method comprises, in each of a plurality of frames:
transferring a clock signal on the first wire in a first direction; transferring first payload data on the second wire in the first direction; transferring second payload data on the second wire in a second direction opposite to the first direction; and transferring control data on the second wire, wherein the format of the frame is such that, irrespective of whether the control data is transferred in the first direction or in the second direction, there is only one pair of reversals of a direction of data transfer in each frame.

2 . A method as claimed in claim 1 , comprising transferring the control data on the second wire, either in the first direction or the second direction, between transferring the first payload data in the first direction and transferring the second payload data in the second direction.

3 . A method as claimed in claim 2 , comprising transferring the control data at a start of each frame, and transferring the first payload data at an end of each frame.

4 . A method as claimed in claim 2 , comprising, when transferring the control data in the first direction, transferring at least one symbol of the control data immediately after transferring the first payload data in the first direction.

5 . A method as claimed in claim 2 , comprising, when transferring the control data in the second direction, transferring the second payload data in the second direction immediately after transferring the control data.

6 . A method as claimed in claim 1 , comprising transferring first payload data in the first direction for a configurable number of symbols in each frame.

7 . A method as claimed in claim 1 , comprising transferring second payload data in the second direction for a configurable number of symbols in each frame.

8 . A method as claimed in claim 1 , comprising transferring control data for four or fewer symbols in each frame.

9 . A method as claimed in claim 1 , comprising transferring control data for only one symbol in each frame.

10 . A method as claimed in claim 1 , comprising transferring data in a plurality of said frames, the method comprising:
transferring said control data in a first direction in a first plurality of said frames, and transferring said control data in a second direction in a second plurality of said frames.

11 . A method as claimed in claim 1 , comprising transferring data in a plurality of said frames,
wherein said frames are grouped in superframes, with a predetermined number of frames in each superframe, wherein the control data from a plurality of the frames in a superframe are combined to form at least one control command.

12 . A method as claimed in claim 11 , wherein each control command comprises a first plurality of symbols forming a command identifier, and a second plurality of symbols forming an operand of the control command.

13 . A method as claimed in claim 12 , wherein the first plurality of symbols form command identifiers identifying one or more of: an address command, a read command, a write command, and a CRC command.

14 . A method as claimed in claim 11 , wherein the control data from a plurality of the frames in a superframe include at least one of a CRC relating to data sent in the first direction and a CRC relating to data sent in the second direction.

15 . A device for transmitting and receiving data over a half-duplex wired communications link that comprises first and second wires, the device being configured to, in each of a plurality of frames:
transmit a clock signal on the first wire in a first direction; transmit first payload data on the second wire in the first direction; receive second payload data on the second wire in a second direction opposite to the first direction; and transmit or receive control data, wherein the format of the frame is such that, irrespective of whether the control data is transferred in the first direction or in the second direction, there is only one pair of reversals of a data transfer direction in each frame.

16 . A device for transmitting and receiving data over a half-duplex wired communications link that comprises first and second wires, the device being configured to, in each of a plurality of frames:
receive a clock signal on the first wire in a first direction; receive first payload data in the first direction; transmit second payload data in a second direction opposite to the first direction; and transmit or receive control data, wherein the format of the frame is such that, irrespective of whether the control data is transferred in the first direction or in the second direction, there is only one pair of reversals of a data transfer direction in each frame.

Assignees

• Cirrus Logic Int Semiconductor Ltd

Inventors

• Zwart Willem

Classifications

• H04L7/0008

  Synchronisation information channels, e.g. clock distribution lines · CPC title

• H04B3/02

  Details · CPC title

• H04L1/0061

  Error detection codes · CPC title

• H04L5/16 Primary

  Half-duplex systems; Simplex/duplex switching; Transmission of break signals {non-automatically inverting the direction of transmission} · CPC title

• G06F13/4291 Primary

  using a clocked protocol · CPC title