Error correction method, semiconductor device, transmission and reception module, and transmitting apparatus

Patent metadata

Field	Value
Publication number	US-2016336965-A1
Application number	US-201615092192-A
Country	US
Kind code	A1
Filing date	Apr 6, 2016
Priority date	May 11, 2015
Publication date	Nov 17, 2016
Grant date	—

Abstract

An error correction method of executing error correction for a coded signal using a space coupling LDPC, includes setting a column weight in a column direction of an element matrix that among element matrices of the space coupling LDPC, corresponds to one end side of a bit string of the signal, to be large as a parity check matrix for detecting errors in multiplying the signal.

First claim

What is claimed is:

1 . An error correction method of executing error correction for a coded signal using a space coupling LDPC, the error correction method comprising:
setting a column weight in a column direction of an element matrix that among element matrices of the space coupling LDPC, corresponds to one end side of a bit string of the signal, to be large as a parity check matrix for detecting errors in multiplying the signal.

2 . The error correction method according to claim 1 , wherein
the setting includes setting a column weight in the column direction of element matrices that among the element matrices of the space coupling LDPC, correspond to respective end sides of the bit string of the signal, to be large.

3 . The error correction method according to claim 1 , wherein
the setting includes setting a column weight in the column direction of an element matrix that among the element matrices of the space coupling LDPC, is on a center side of the bit string of the signal, to be smallest.

4 . The error correction method according to claim 1 , wherein
the setting includes:
setting a column weight in the column direction of element matrices that among the element matrices of the space coupling LDPC, are of respective end sides of the bit string of the signal, to be large, and
setting a column weight in the column direction of element matrices, to be progressively smaller from the respective end sides toward a center of the bit string of the signal.

5 . The error correction method according to claim 1 and further comprising
obtaining a distribution of column weights of the element matrices of the space coupling LDPC, using a genetic algorithm having conditions including longitudinal and lateral sizes of the element matrices, a coupling state of the element matrices, a control value of a number of decoding sessions, and a BER threshold value.

6 . A semiconductor device comprising
a decoding circuit that executes error correction for a coded signal using a space coupling LDPC, wherein the decoding circuit executes the error correction for the signal using a parity check matrix for error detection, the parity check matrix being an element matrix that among element matrices of the space coupling LDPC, corresponds to one end side of a bit string of the signal and that has a column weight in a column direction set to be large.

7 . The semiconductor device according to claim 6 , wherein
the semiconductor device is used in a decoding device that decodes the signal in a transmitting apparatus of a communication system or a decoding device that reads the signal from a storage medium of a storage system.

8 . A transmission and reception module comprising
a decoding circuit that executes error correction for a coded signal using a space coupling LDPC, wherein the decoding circuit executes the error correction for the signal using a parity check matrix for error detection, the parity check matrix being an element matrix that among element matrices of the space coupling LDPC, corresponds to one end side of a bit string of the signal and has a column weight in a column direction set to be large.

9 . A transmitting apparatus comprising
a decoding circuit that executes error correction for a coded signal using a space coupling LDPC, wherein the decoding circuit executes the error correction for the signal using a parity check matrix for error detection, the parity check matrix being an element matrix that among element matrices of the space coupling LDPC, corresponds to one end side of a bit string of the signal and has a column weight in a column direction set to be large.

10 . A transmitting apparatus that executes error correction for a coded signal using a space coupling RA code, the transmitting apparatus comprising
a decoding circuit that decodes the signal and executes error correction for the signal using a parity check matrix for detecting errors, the parity check matrix being an element matrix that among element matrices of a space coupling LDPC, corresponds to one end side of a bit string of the signal and has a column weight in a column direction set to be large; and a coding circuit that encodes the signal, using a generator matrix for coding, the generator matrix being an element matrix that among element matrices of a space coupling LDPC and similar to the parity check matrix used by the decoding circuit, corresponds to the one end side of the bit string of the signal and has a column weight in a column direction set to be large.

Assignees

• Fujitsu Ltd
• Mobile Techno Corp

Inventors

• Koganei Yohei
• Kojima Chikara
• Li Cong

Classifications

• H03M13/1105 Primary

  Decoding · CPC title

• H03M13/616 Primary

  Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations · CPC title

• H03M13/1102

  Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title

• H03M13/036

  Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error · CPC title

• H03M13/1148 Primary

  Structural properties of the code parity-check or generator matrix · CPC title