Bidirectional communication demodulation for wireless charging system

Patent metadata

Field	Value
Publication number	US-2016336785-A1
Application number	US-201514942977-A
Country	US
Kind code	A1
Filing date	Nov 16, 2015
Priority date	May 11, 2015
Publication date	Nov 17, 2016
Grant date	—

Abstract

A system and method for demodulating a wireless power signal onto which binary data has been modulated involves processing the wireless power signal with analog circuitry to produce a modified power signal in accordance with the type of demodulation used, periodically capturing digital samples of the modified power signal to produce a series of digital samples, applying, with an MCU, at least two digital filtering algorithms to the digital samples to determine transitions associated with the modulation, and recovering, with the MCU, the binary data as a function of the determined transitions. The demodulator is applicable to bidirectional power transfer capable devices and includes algorithms that can be applied similarly to both ASK and FSK demodulations with little or no modification.

First claim

1 . In a wireless charging system comprising a power transmitter and a power receiver, wherein a primary coil in the power transmitter wirelessly transmits a power signal to a secondary coil in the power receiver, a method implemented by one of the power transmitter and the power receiver for recovering binary data modulated on the power signal using a bi-phase digital encoding scheme, the method comprising:
(a) processing an analog signal corresponding to voltage in a first coil of the wireless charging system using analog circuitry to generate a processed analog signal, wherein the first coil is one of the primary coil and the secondary coil; (b) sampling the processed analog signal to generate a sequence of digital samples; (c) detecting transitions in the sequence of digital samples associated with the bi-phase digital encoding scheme by applying two or more different transition-detection filters to the sequence of digital samples; and (d) decoding the detected transitions to recover the binary data.

2 . The method of claim 1 , wherein:
the binary data is transmitted from the power receiver to the power transmitter; the method is implemented by the power transmitter; the binary data is modulated onto the power signal using amplitude shift keying (ASK) modulation; the first coil is the primary coil in the power transmitter; and the digital samples represent amplitude of the power signal.

3 . The method of claim 2 , wherein:
step (a) comprises scaling the analog signal to generate the processed analog signal as a scaled-down waveform; and step (b) comprises periodically sampling the scaled-down waveform at expected times of occurrences of voltage peaks in the scaled-down waveform using an analog-to-digital converter triggered by a pulse-width modulator.

4 . The method of claim 3 , wherein the power transmitter implements the method.

5 . The method of claim 3 , wherein the power receiver implements the method.

6 . The method of claim 1 , wherein:
the binary data is transmitted from the power transmitter to the power receiver; the method is implemented by the power receiver; the binary data is modulated onto the power signal using frequency-shift keying (FSK) modulation; the first coil is the secondary coil in the power transmitter; and the digital samples represent the period of the power signal.

7 . The method of claim 6 , wherein:
step (a) comprises squaring up the analog signal using a zero-crossing detector circuit to generate the processed analog signal as a squared-up waveform; and step (b) comprises sampling the squared-up waveform using one of (i) a sequence of the rising edges or (ii) a sequence of falling edges of the squared-up waveform to trigger a timer that measures periods of cycles of the squared-up waveform, wherein each digital sample represents a measured period of a different cycle of the squared-up waveform.

8 . The method of claim 1 , wherein the two or more different transition-detection filters comprise two or more of:
a first transition-detection filter algorithm comprising detecting a transition only if amplitudes of the digital samples are determined to correspond to expected sample amplitudes; and a second transition-detection filter algorithm comprising:
(A1) calculating a first average of a first N of the digital samples, N>1;
(A2) calculating a second average of a subsequent N of the digital samples;
(A3) calculating a first difference between the first and second averages; and
(A4) detecting a first transition candidate when the magnitude of the difference exceeds a first specified threshold value; and
a third transition-detection filter algorithm comprising:
(C1) detecting a valid low-to-high transition only if a most-recent bit 0 in the binary data was encoded at a high sample level; and
(C2) detecting a valid high-to-low transition only if the most-recent bit 0 in the binary data was encoded at a low sample level; and
a fourth transition-detection filter algorithm comprising:
(B1) calculating a first weighted average using a first set of the digital samples corresponding to a sliding window;
(B2) calculating a second weighted average using a second set of the digital samples corresponding to the sliding window;
(B3) calculating a second difference between the first and second weighted averages; and
(B4) detecting a second transition candidate when the magnitude of the second difference exceeds a second specified threshold value; and
a fifth transition-detection filter algorithm comprising detecting a transition only if timing of the transition is determined to correspond to an expected transition time.

9 . The method of claim 8 , wherein:
the two or more different transition-detection filters comprise the second transition-detection filter and the fourth transition-detection filter; and step (c) comprises detecting a transition only if the first transition candidate corresponds with the second transition candidate.

10 . The method of claim 9 , wherein the two or more different transition-detection filters further comprise the third transition-detection filter.

11 . The method of claim 9 , wherein the two or more different transition-detection filters further comprise the fifth transition-detection filter.

12 . The method of claim 9 , wherein the two or more different transition-detection filters further comprise the first transition-detection filter.

13 . The method of claim 9 , wherein the two or more different transition-detection filters further comprise the first, third, and fifth transition-detection filters.

14 . The method of claim 1 , wherein step (b) comprises:
periodically sampling the processed analog signal at a sequence of sampling times separated by a normal sampling interval corresponding to an integer multiple of a cycle of the processed analog signal; and the sampling times are based on results of a calibration process in which the processed analog signal is sampled at calibration sampling times separated by a calibration sampling interval that is different from the normal sampling interval to generate a sequence of calibration samples that approximates samples generated by sampling the processed analog signal multiple times over a single cycle of the processed analog signal.

15 . The method of claim 14 , wherein the calibration sampling interval is longer than the normal sampling interval.

16 . The method of claim 1 , wherein:
steps (c) and (d) are implemented in a micro-controller unit (MCU) of a node in the wireless charging system that can function in either a power-transmitter mode or a power-receiver mode; when the node functions in the power-transmitter mode, (i) the power signal is an ASK-modulated power signal and (ii) the MCU implements steps (c) and (d) to recover the binary data from the ASK-modulated power signal; and when the node functions in the power-receiver mode, (i) the power signal is an FSK-modulated power signal and (ii) the MCU implements steps (c) and (d) to recover the binary data from the FSK-modulated power signal.

17 . The method of claim 1 , wherein the power transmitter implements the method.

18 . The method of claim 1 , wherein the power receiver implements the method.

Assignees

• Freescale Semiconductor Inc

Inventors

• Gao Xiang
• Fei Zhendong
• Ye Wanfu

Classifications

• H02J7/44

  between battery management systems and power sources · CPC title

• H02J7/00

  Circuit arrangements for charging or discharging batteries or for supplying loads from batteries · CPC title

• H02J50/80 Primary

  involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices · CPC title

• H04B5/45

  Transponders · CPC title

• H04B5/266

  One coil at each side, e.g. with primary and secondary coils · CPC title