Discontinuous patterned bonds for semiconductor devices and associated systems and methods

US2016336302A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016336302-A1
Application numberUS-201615159237-A
CountryUS
Kind codeA1
Filing dateMay 19, 2016
Priority dateAug 29, 2011
Publication dateNov 17, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

First claim

Opening claim text (preview).

1 - 8 . (canceled) 9 . A semiconductor device, comprising: a substrate having at least one projection defining a recess, wherein the recess includes a blind end, and wherein the at least one projection is a continuous portion of the substrate; a bond metal structure positioned at the blind end of the recess and bonded to the substrate; and a solid-state transducer positioned within the recess and bonded to the bond metal structure. 10 . The semiconductor device of claim 9 wherein the substrate includes a plurality of sides defining a perimeter, and wherein the plurality of sides include exposed portions of the at least one projection. 11 . The semiconductor device of claim 9 wherein the bond metal structure includes a first bond metal and a second bond metal, and wherein the first bond metal is bonded to the second bond metal. 12 . The semiconductor device of claim 9 wherein the bond metal structure is completely surrounded by a combination of the solid-state transducer and the substrate. 13 . The semiconductor device of claim 12 wherein the at least one projection surrounds a perimeter of the bond metal structure, wherein a portion of the substrate at the blind end of the recess adjoins a first side of the bond metal, and wherein the solid-state transducer adjoins a second side of the bond metal, opposite to the first side. 14 . The semiconductor device of claim 9 wherein the semiconductor device comprises a diced die. 15 . The semiconductor device of claim 14 wherein the substrate includes a plurality of sides defining a perimeter, wherein the plurality of sides comprise diced faces. 16 . The semiconductor device of claim 9 wherein the recess has a depth between 5 microns and 15 microns. 17 . A semiconductor device, comprising: a substrate having at least one projection defining at least a portion of a recess and at least partially forming a perimeter of the semiconductor device; and a solid-state transducer positioned within the recess, wherein the at least one projection encloses a perimeter of the solid-state transducer. 18 . The semiconductor device of claim 17 wherein the at least one projection comprises diced portions of the substrate. 19 . The semiconductor device of claim 17 wherein the at least one projection is continuous with the substrate and the at least one projection extends continuously around the perimeter of the solid-state transducer. 20 . The semiconductor device of claim 17 , further comprising a bond metal structure positioned within the recess and bonding the solid-state transducer to the substrate. 21 . The semiconductor device of claim 20 wherein the at least one projection extends continuously around a perimeter of the bond metal structure. 22 . The semiconductor device of claim 17 wherein the substrate and the solid-state transducer together define six planar faces, wherein the substrate comprises the entirety of five of the six planar faces. 23 . The semiconductor device of claim 22 wherein a remaining one of the six planar faces includes an exposed surface of the solid-state transducer, and a surface of the at least one projection extends around a perimeter of the exposed surface of the solid-state transducer. 24 . The semiconductor device of claim 17 wherein the recess includes a blind end, the semiconductor device further comprising a bond metal structure positioned between the blind end and the solid-state transducer and bonding the solid-state transducer to the substrate. 25 . A semiconductor device having six sides, the semiconductor device comprising: a substrate, wherein five of the six sides of the semiconductor device are composed entirely of corresponding exposed planar faces of the substrate, and wherein a sixth side of the semiconductor device includes a recess in the substrate; a bond metal structure positioned within the recess and bonded to the substrate; and a solid-state transducer positioned within the recess and bonded to the bond metal structure, wherein the sixth side of the semiconductor device includes a planar face composed of an exposed portion of the solid-state transducer and a plurality of exposed portions of the substrate. 26 . The semiconductor device of claim 25 wherein the solid-state transducer includes a perimeter, wherein the substrate includes at least one projection extending continuously around the perimeter of the solid-state transducer, and wherein the at least one projection includes the plurality of exposed portions of the substrate on the sixth side. 27 . The semiconductor device of claim 25 wherein the substrate includes at least one projection, and wherein the at least one projection is in contact with the solid-state transducer. 28 . The semiconductor device of claim 27 wherein at least one of the exposed planar faces comprises a diced face.

Assignees

Inventors

Classifications

  • batch processes · CPC title

  • of die-attach connectors · CPC title

  • involving guiding structures, e.g. spacers or supporting members · CPC title

  • Active alignment, e.g. using optical alignment using marks or sensors · CPC title

  • the auxiliary member being a temporary substrate, e.g. a removable substrate · CPC title

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What does patent US2016336302A1 cover?
Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bo…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).