Backside cavity formation in semiconductor devices

Patent metadata

Field	Value
Publication number	US-2016336228-A1
Application number	US-201615154817-A
Country	US
Kind code	A1
Filing date	May 13, 2016
Priority date	May 15, 2015
Publication date	Nov 17, 2016
Grant date	—

Abstract

Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, removing at least a portion of the interface material to form a trench, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.

First claim

What is claimed is:

1 . A method for fabricating a radio-frequency (RF) device, the method comprising:
providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate; removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer; applying an interface material to at least a portion of the backside of the oxide layer; removing at least a portion of the interface material to form a trench; and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.

2 . The method of claim 1 further comprising applying a substrate contact layer to at least a portion of the backside of the oxide layer, the substrate contact layer being at least partially exposed in the cavity after said covering the at least a portion of the interface material and the trench.

3 . The method of claim 2 wherein the substrate contact layer is electrically coupled to the FET via a through-oxide via.

4 . The method of claim 1 further comprising removing a handle wafer from a top-side of a passivation layer disposed above the FET.

5 . The method of claim 4 wherein the passivation layer is one of one or more dielectric layers formed over electrical connections to the FET.

6 . The method of claim 1 wherein the trench is at least partially below the FET.

7 . The method of claim 1 wherein the trench is at least partially below an electrical device coupled to the FET via one or more electrical connections formed in one or more dielectric layers formed over the FET.

8 . The method of claim 1 wherein said removing the at least a portion of the interface material comprises etching away the at least a portion of the interface material.

9 . A radio-frequency (RF) device comprising:
a field-effect transistor (FET) implemented over an oxide layer; an interface layer applied to at least a portion of a backside of the oxide layer, the interface layer having a trench formed therein; and a substrate layer covering at least a portion of the interface layer and the trench to form a cavity.

10 . The RF device of claim 9 further comprising a substrate contact layer applied to at least a portion of the backside of the oxide layer, the substrate contact layer being at least partially exposed in the cavity.

11 . The RF device of claim 10 wherein the substrate contact layer is electrically coupled to the FET via a through-oxide via.

12 . The RF device of claim 9 further comprising one or more dielectric layers formed over electrical connections to the FET.

13 . The RF device of claim 9 wherein the trench is at least partially below the FET.

14 . The RF device of claim 9 wherein the trench is at least partially below an electrical device coupled to the FET via one or more electrical connections formed in one or more dielectric layers formed over the FET.

15 . A wireless device comprising:
a transceiver configured to process radio-frequency (RF) signals; an RF module in communication with the transceiver, the RF module including a switching device having a field-effect transistor (FET) implemented over an oxide layer, an interface layer applied to at least a portion of a backside of the oxide layer, the interface layer having a trench formed therein, and a substrate layer covering at least a portion of the interface layer and the trench to form a cavity; and an antenna in communication with the RF module, the antenna configured to facilitate transmitting and/or receiving of the RF signals.

16 . The wireless device of claim 15 wherein the RF module includes a substrate contact layer applied to at least a portion of the backside of the oxide layer, the substrate contact layer being at least partially exposed in the cavity.

17 . The wireless device of claim 16 wherein the substrate contact layer is electrically coupled to the FET via a through-oxide via.

18 . The wireless device of claim 15 wherein the switching device includes one or more dielectric layers formed over electrical connections to the FET.

19 . The wireless device of claim 15 wherein the trench is at least partially below the FET.

20 . The wireless device of claim 15 wherein the trench is at least partially below an electrical device coupled to the FET via one or more electrical connections formed in one or more dielectric layers formed over the FET.

Assignees

• Skyworks Solutions Inc

Inventors

• Petzold David T
• Whitefield David Scott

Classifications

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W20/218

  in silicon-on-insulator [SOI] wafers · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title