Method and devices for controlling operations of a central processing unit

Patent metadata

Field	Value
Publication number	US-2016335205-A1
Application number	US-201615157676-A
Country	US
Kind code	A1
Filing date	May 18, 2016
Priority date	Dec 13, 2011
Publication date	Nov 17, 2016
Grant date	—

Abstract

Control circuitry controls the operations of a central processing unit, CPU, which is associated with a nominal clock frequency. The CPU is further coupled to an I/O range and configured to deliver input to an application. The control circuitry controls the CPU to poll the I/O range for input to the application. The control circuitry also monitors whether or not each poll results in input to the application and adjusts a clock frequency at which the CPU operates to a clock frequency lower than the nominal clock frequency if a pre-defined number of polls resulting in no input is detected. Methods and a central computer server of an automated exchange system are also provided.

First claim

1 . A method for use in a system including control circuitry for controlling operations of a processor, wherein the processor is associated with an input/output (I/O) range and is configured to deliver input to an application, the method comprising:
operating the processor at a first clock frequency lower than a nominal clock frequency of the processor; determining that the processor has performed or is about to perform one or more polls of the I/O range; monitoring to determine whether each of the one or more polls results in detection of input data for the application at the I/O range; and in response to determining that a given number of the polls results in detection of input data, adjusting a clock frequency at which the processor operates to a second clock frequency that is greater than the first clock frequency.

2 . The method of claim 1 , wherein the second frequency is the nominal frequency.

3 . The method of claim 1 , further comprising:
determining a temperature of the processor; comparing the determined temperature to a threshold; and increasing, at least for a predetermined time period, the clock frequency at which the processor operates to a third clock frequency that is greater than the second clock frequency and greater than the nominal frequency.

4 . The method of claim 1 , further comprising the processor bypassing an operating system kernel of the processor to poll the I/O range.

5 . The method of claim 1 , further comprising the application executing on the processor using a hardware instruction library to poll the I/O range directly.

6 . The method of claim 1 , further comprising performing the poll of the I/O range while avoiding a context switch in the processor between the application and an operating system kernel operational on the processor.

7 . The method of claim 1 , further comprising performing the poll of the I/O range in response to an instruction from the application.

8 . The method of claim 1 , wherein the monitoring involves monitoring read operations on the I/O range, and a poll that does not result in the detection of input data is detected by detecting, within a given number of instructions following a performed read operation on the I/O range, a return to the same instruction to read the I/O range.

9 . The method of claim 1 , wherein the I/O range is one of:
an I/O port; or a memory address to which an I/O device is mapped.

10 . The method of claim 1 , wherein the monitoring involves monitoring read operations on the I/O range.

11 . The method of claim 1 , wherein the given number of the polls is one.

12 . A computing device, comprising:
an input/output (I/O) range; and a processor is coupled to the I/O range and is configured to execute an application; wherein the processor is configured to perform actions that include:
operating the processor at a first clock frequency lower than a nominal clock frequency associated with operation of the processor;
determining that the processor has performed or is about to perform one or more polls of the I/O range;
monitoring to determine whether each of the one or more polls results in detection of input data for the application at the I/O range; and
in response to determining that a given number of the polls results in detection of input data, adjusting a clock frequency at which the processor operates to a second clock frequency that is greater than the first clock frequency.

13 . The computing device of claim 12 , wherein the I/O range is an I/O port.

14 . The computing device of claim 12 , wherein the I/O range is a memory address to which an I/O device is mapped.

15 . The computing device of claim 12 , wherein the processor is a central processing unit (CPU).

16 . The computing device of claim 12 , wherein the second frequency is the nominal frequency.

17 . The computing device of claim 12 , further comprising:
circuitry configured to determine a temperature of the processor; wherein the processor is configured to perform actions that include:
comparing the determined temperature to a threshold; and
increasing, at least for a predetermined time period, the clock frequency at which the processor operates to a third clock frequency that is greater than the second clock frequency and greater than the nominal frequency.

18 . The computing device of claim 12 , wherein the processor is configured to bypass an operating system kernel of the processor to poll the I/O range.

19 . The computing device of claim 12 , wherein the processor includes an application executable on the processor using a hardware instruction library to poll the I/O range directly.

20 . The computing device of claim 12 , wherein the processor is configured to perform the poll of the I/O range while avoiding a context switch in the processor between an application and an operating system kernel running on the processor.

21 . The computing device of claim 12 , wherein the polls are performed in response to an instruction from the application.

22 . The computing device of claim 12 , wherein the monitoring involves monitoring read operations on the I/O range.

23 . The computing device of claim 12 , wherein the given number of the polls is one.

Assignees

• Nasdaq Tech Ab

Inventors

• Winbom Hakan

Classifications

• H04L12/6418

  Hybrid transport · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F1/3234

  Power saving characterised by the action undertaken · CPC title

• G06F13/22 Primary

  using successive scanning, e.g. polling (G06F13/24 takes precedence) · CPC title

• G06F1/3209

  Monitoring remote activity, e.g. over telephone lines or network connections · CPC title