Process for manufacturing a microelectromechanical interaction system for a storage medium

Patent metadata

Field	Value
Publication number	US-2016332871-A1
Application number	US-201615220267-A
Country	US
Kind code	A1
Filing date	Jul 26, 2016
Priority date	Dec 20, 2006
Publication date	Nov 17, 2016
Grant date	—

Abstract

A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity and a top surface; forming a first interaction region having a second type of conductivity, opposite to the first type of conductivity, in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity, so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.

First claim

1 . A process, comprising:
manufacturing a microelectromechanical interaction system for a storage medium, said interaction system including a supporting element and an interaction element carried by said supporting element, the manufacturing including: forming, in a semiconductor wafer having a substrate with a first type of conductivity and a top surface, a first interaction region having a second type of conductivity, opposite to said first type of conductivity, in a surface portion of said substrate in proximity of said top surface; and electrochemically etching said substrate starting from said top surface, selective with respect to said second type of conductivity, the electrochemically etching including removing said surface portion of said substrate and separating said first interaction region from said substrate, thus forming said supporting element.

2 . The process according to claim 1 , wherein said first conductivity is of a P type and said second conductivity is of an N type; said electrochemically etching being carried out in a dark condition with an aqueous solution of HF.

3 . The process according to claim 2 , wherein said solution comprises a percentage of hydrofluoric acid HF comprised between 1 vol % and 25 vol %.

4 . The process according to claim 1 , wherein after said electrochemically etching, said supporting element is suspended in cantilever fashion above said substrate, and said interaction element has a sharpened shape facing in a direction opposite to said substrate.

5 . The process according to claim 1 , comprising, prior to the electrochemically etching, forming a path with said first type of conductivity between said top surface and an opposite bottom surface of said semiconductor wafer.

6 . The process according to claim 1 , wherein said first interaction region comprises first and second arms extending in a first direction, and a connection portion extending in a second direction, transverse to said first direction, and joining said first and second arms at first ends of the first and second arms; said first and second arms being separated in said second direction by said substrate.

7 . The process according to claim 6 , further comprising, simultaneously to forming the first interaction region, forming, in a further surface portion of said substrate, a body region, having said second type of conductivity and joined to said first interaction region, said first and second arms extending from said body region in said first direction, and joined at second ends of the first and second arms to said body region.

8 . The process according to claim 1 , wherein forming the first interaction region comprises introducing dopant species of said second type of conductivity within said substrate, and defining a thickness of said supporting element by controlling a depth of introduction of said dopant species.

9 . The process according to claim 1 , further comprising forming, above said top surface and above a specific portion of said first interaction region, a second interaction region having said second type of conductivity, said second interaction region being surrounded by a sacrificial region, having said first type of conductivity and having a bottom joined to said substrate; wherein said electrochemically etching further comprises defining said interaction element on top of said supporting element by removing said sacrificial region, in a way substantially simultaneous to separating said first interaction region from said substrate.

10 . The process according to claim 9 , wherein forming the second interaction region comprises:
forming an epitaxial structural layer on said top surface; forming a mask region on said structural layer, above said specific portion of said first interaction region; and introducing dopant species of said first type of conductivity within said structural layer through said mask region for reversing a conductivity of said structural layer, thus defining said second interaction region underneath said mask region and creating a path having said first type of conductivity towards said substrate.

11 . The process according to claim 10 , wherein said first interaction region comprises first and second arms extending in a first direction, and a connection portion extending in a second direction, transverse to said first direction, and joining said first and second arms at first ends of the first and second arms; said first and second arms being separated in said second direction by said substrate, wherein said specific portion of said first interaction region is set centrally above said connection portion.

12 . The process according to claim 10 wherein introducing dopant species of said first type of conductivity comprises implanting, and subsequently diffusing underneath said mask region, said dopant species; and defining a desired dimension and shape of said interaction element by controlling parameters of said implanting and of said diffusing, and/or dimensions of said mask region.

13 . The process according to claim 12 wherein said defining is such that said interaction element has nanometric smaller dimensions, and a sharpened shape with a tip end facing away from said top surface of said substrate.

14 . The process according to claim 12 wherein said defining is such that fronts of said diffusing meet underneath said mask region, so that said interaction element has a conical shape with hollowed walls.

15 . The process according to claim 9 , further comprising:
forming a resistor region, having said first type of conductivity, within said first interaction region; and prior to said forming the second interaction region, forming a cover region, having said second type of conductivity, on said first interaction region, the covering region burying the resistor region within said first interaction region.

16 . The process according to claim 15 wherein said forming the cover region comprises:
forming an epitaxial cover layer on top of said substrate; and reversing a conductivity of said cover layer except at the top of said first interaction region, thus forming said cover region on said first interaction region, and a sacrificial region elsewhere, designed to create a path having said first type of conductivity towards said substrate.

17 . The process according to claim 1 wherein said substrate is monolithic, and said semiconductor material is monocrystalline silicon.

18 . A process for manufacturing a probe-storage device, comprising:
forming a storage medium; forming an interaction system with a supporting element and an interaction element carried by said supporting element, forming the interaction system including:
forming, in a semiconductor wafer having a substrate with a first type of conductivity and a top surface, a first interaction region having a second type of conductivity, opposite to said first type of conductivity, in a surface portion of said substrate in proximity of said top surface; and
electrochemically etching said substrate starting from said top surface, selective with respect to said second type of conductivity, the electrochemically etching removing said surface portion of said substrate and separating said first interaction region from said substrate, thus forming said supporting element; and
coupling said interaction system to the storage medium in such a way that said supporting element is suspended in cantilever fashion above said storage medium and said interaction element faces said storage medium.

19 . The process according to

Assignees

• St Microelectronics Srl

Inventors

• Barillaro Giuseppe
• Diligenti Alessandro
• Riva Caterina
• Campedelli Roberto
• Losa Stefano

Classifications

• B81C1/00539 Primary

  Wet etching · CPC title

• B81C2203/0714

  Forming the micromechanical structure with a CMOS process · CPC title

• B81C2201/0136

  by doping limited material regions · CPC title

• H10B63/10

  Phase change RAM [PCRAM, PRAM] devices · CPC title

• B81C1/00595 Primary

  Control etch selectivity · CPC title